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    Graphical user interface component classification
    3.
    发明授权
    Graphical user interface component classification 有权
    图形用户界面组件分类

    公开(公告)号：US09104450B2

    公开(公告)日：2015-08-11

    申请号：US12605418

    申请日：2009-10-26

    申请人： Sagi Schein ,  Omer Barkol ,  Ruth Bergman ,  Ayelet Pnueli ,  Michael Pogrebisky

    发明人： Sagi Schein ,  Omer Barkol ,  Ruth Bergman ,  Ayelet Pnueli ,  Michael Pogrebisky

    IPC分类号： G06N3/02 ,  G06N5/02 ,  G06N5/04 ,  G06F9/455

    CPC分类号： G06F9/45512 ,  G06N3/02 ,  G06N5/02 ,  G06N5/04

    摘要： Systems, methods, and other embodiments associated with graphical user interface (GUI) component classification are described. One example method includes generating a first vector. The first vector may be generated based on image data describing a GUI component. The example method may also include assigning a GUI component classifier to the GUI component. Assigning the GUI component classifier may comprise comparing the first vector to members of a vector set. Members of the vector set may describe GUI elements. The example method may also include providing the GUI component classifier.

    摘要翻译： 描述了与图形用户界面（GUI）组件分类相关联的系统，方法和其他实施例。 一个示例性方法包括生成第一向量。 可以基于描述GUI组件的图像数据生成第一向量。 该示例方法还可以包括将GUI组件分类器分配给GUI组件。 分配GUI组件分类器可以包括将第一向量与矢量集的成员进行比较。 矢量集的成员可以描述GUI元素。 该示例方法还可以包括提供GUI组件分类器。

    Graphical user interface component identification
    4.
    发明授权
    Graphical user interface component identification 有权
    图形用户界面组件标识

    公开(公告)号：US08762873B2

    公开(公告)日：2014-06-24

    申请号：US12605426

    申请日：2009-10-26

    申请人： Ayelet Pnueli ,  Omer Barkol ,  Ruth Bergman ,  Michael Pogrebisky ,  Sagi Schein

    发明人： Ayelet Pnueli ,  Omer Barkol ,  Ruth Bergman ,  Michael Pogrebisky ,  Sagi Schein

    IPC分类号： G06F3/048

    CPC分类号： G06F8/38

    摘要： Systems, methods, and other embodiments associated with graphical user interface (GUI) component identification are described. One example method includes identifying a set of GUI components. The identifying may be based on a screen image of a GUI. The screen image may comprise data describing a visual representation of the GUI. The example method may also include providing data identifying the set of GUI components.

    摘要翻译： 描述了与图形用户界面（GUI）组件标识相关联的系统，方法和其他实施例。 一个示例性方法包括识别一组GUI组件。 识别可以基于GUI的屏幕图像。 屏幕图像可以包括描述GUI的视觉表示的数据。 示例性方法还可以包括提供标识GUI组件集合的数据。

    Method and apparatus for calculating a focus metric
    7.
    发明授权
    Method and apparatus for calculating a focus metric 有权
    用于计算焦点度量的方法和装置

    公开(公告)号：US07634188B2

    公开(公告)日：2009-12-15

    申请号：US11699445

    申请日：2007-01-29

    申请人： Ayelet Pnueli ,  Mani Fischer

    发明人： Ayelet Pnueli ,  Mani Fischer

    IPC分类号： G03B3/00 ,  G03B13/00 ,  G02B15/14 ,  H04N5/232

    CPC分类号： H04N5/23212 ,  G02B7/36

    摘要： A method comprises receiving a focusing image and shifting the focusing image to obtain a shifted focusing image. In the method, a focus metric of the focusing image is calculated from the focusing image and the shifted focusing image, where the focus metric is configured for use as a factor in making an automatic focus adjustment determination. An automatic focusing apparatus includes a controller configured to implement the method.

    摘要翻译： 一种方法包括接收聚焦图像并移动聚焦图像以获得移动的聚焦图像。 在该方法中，从聚焦图像和偏移聚焦图像计算聚焦图像的焦点度量，其中焦点度量配置为用作进行自动聚焦调整确定的因素。 一种自动对焦装置，包括实施该方法的控制器。

    Kill index analysis for automatic defect classification in semiconductor wafers
    9.
    发明授权
    Kill index analysis for automatic defect classification in semiconductor wafers 有权
    半导体晶圆自动缺陷分类的杀伤指数分析

    公开(公告)号：US06673657B2

    公开(公告)日：2004-01-06

    申请号：US10195769

    申请日：2002-07-11

    申请人： Ayelet Pnueli ,  Ariel Ben-Porath

    发明人： Ayelet Pnueli ,  Ariel Ben-Porath

    IPC分类号： H01L21332

    CPC分类号： H01L22/20

    摘要： A kill index classification method for prioritizing relational aspects of topological defect intersections, particularly in association with an intermediate analytical testing stage of a multi-stage semiconductor fabrication process. The method relates to an analysis of the geometrical relationship between non-predetermined portion(s), generally referred to as defects, and the surrounding predetermined topology of a conductive semiconductor pattern, to determine the effect of defects on the functionality and reliability of a wafer, and particularly an examined die thereon. Further, in accordance with this geometrical information, a preferred classification of the effects of defects into a numerical value, the “kill index”, is achieved. Preferably, this kill index is strongly linked, correlated and related to the damage caused by the defect to the functionality and/or reliability of the underlying integrated circuit.

    摘要翻译： 用于优先考虑拓扑缺陷交叉点的关系方面的杀死指数分类方法，特别是与多级半导体制造过程的中间分析测试阶段相关联。 该方法涉及对通常称为缺陷的非预定部分（通常称为缺陷）和导电半导体图案的周围预定拓扑之间的几何关系的分析，以确定缺陷对晶片的功能性和可靠性的影响 ，特别是其上检查的模具。 此外，根据该几何信息，可以将缺陷的影响的优选分类为数值，即“杀死指数”。 优选地，该杀死指数与由缺陷引起的对下层集成电路的功能和/或可靠性的强烈连接，相关和相关。

    Kill index analysis for automatic defect classification in semiconductor wafers
    10.
    发明授权
    Kill index analysis for automatic defect classification in semiconductor wafers 有权

    公开(公告)号：US06605478B2

    公开(公告)日：2003-08-12

    申请号：US09822919

    申请日：2001-03-30

    申请人： Ayelet Pnueli ,  Ariel Ben-Porath

    发明人： Ayelet Pnueli ,  Ariel Ben-Porath

    IPC分类号： G01R3126

    CPC分类号： H01L22/20

    摘要： A kill index classification method for prioritizing relational aspects of topological defect intersections, particularly in association with an intermediate analytical testing stage of a multi-stage semiconductor fabrication process. The method relates to an analysis of the geometrical relationship between non-predetermined portion(s), generally referred to as defects, and the surrounding predetermined topology of a conductive semiconductor pattern, to determine the effect of defects on the functionality and reliability of a wafer, and particularly an examined die thereon. Further, in accordance with this geometrical information, a preferred classification of the effects of defects into a numerical value, the “kill index”, is achieved. Preferably, this kill index is strongly linked, correlated and related to the damage caused by the defect to the functionality and/or reliability of the underlying integrated circuit.