公开(公告)号：US20190157147A1

公开(公告)日：2019-05-23

申请号：US16237948

申请日：2019-01-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungwoo MYUNG ,  GeumJung SEONG ,  Jisoo OH ,  JinWook LEE ,  Dohyoung KIM ,  Yong-Ho JEON

IPC: H01L21/768 ,  H01L29/78 ,  H01L23/535 ,  H01L29/66 ,  H01L27/088

CPC classification number: H01L21/76895 ,  H01L21/76805 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.

公开(公告)号：US20180061958A1

公开(公告)日：2018-03-01

申请号：US15794107

申请日：2017-10-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungwoo MYUNG ,  GeumJung SEONG ,  Jisoo OH ,  JinWook LEE ,  Dohyoung KIM ,  Yong-Ho JEON

IPC: H01L29/49 ,  H01L21/768 ,  H01L29/66 ,  H01L23/535 ,  H01L29/161 ,  H01L29/16 ,  H01L29/06 ,  H01L27/088 ,  H01L29/78

CPC classification number: H01L21/76895 ,  H01L21/76805 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.

公开(公告)号：US20170200802A1

公开(公告)日：2017-07-13

申请号：US15401562

申请日：2017-01-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungwoo MYUNG ,  GeumJung SEONG ,  Jisoo OH ,  JinWook LEE ,  Dohyoung KIM ,  Yong-Ho JEON

IPC: H01L29/49 ,  H01L29/06 ,  H01L29/16 ,  H01L21/768 ,  H01L29/78 ,  H01L23/535 ,  H01L29/66 ,  H01L27/088 ,  H01L29/161

CPC classification number: H01L21/76895 ,  H01L21/76805 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.