公开(公告)号：US20180061958A1

公开(公告)日：2018-03-01

申请号：US15794107

申请日：2017-10-26

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Sungwoo MYUNG ,  GeumJung SEONG ,  Jisoo OH ,  JinWook LEE ,  Dohyoung KIM ,  Yong-Ho JEON

IPC分类号： H01L29/49 ,  H01L21/768 ,  H01L29/66 ,  H01L23/535 ,  H01L29/161 ,  H01L29/16 ,  H01L29/06 ,  H01L27/088 ,  H01L29/78

CPC分类号： H01L21/76895 ,  H01L21/76805 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

摘要： A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.

公开(公告)号：US20190295889A1

公开(公告)日：2019-09-26

申请号：US16176943

申请日：2018-10-31

申请人： Samsung Electronics Co., Ltd.

发明人： Keun Hee BAI ,  Sung Woo KANG ,  Kee Sang KWON ,  Dong Seok LEE ,  Sang Hyun LEE ,  Jeong Yun LEE ,  Yong-Ho JEON

IPC分类号： H01L21/768 ,  H01L21/8234 ,  H01L29/51 ,  H01L29/66

摘要： A semiconductor device with improved product reliability and a method of fabricating the semiconductor are provided. The semiconductor device includes a substrate, a gate electrode on the substrate, a first spacer on a sidewall of the gate electrode, a conductive contact on a sidewall of the first spacer to protrude beyond a top surface of the gate electrode, a trench defined by the top surface of the gate electrode, a top surface of the first spacer, and sidewalls of the contact, an etching stop layer extending along at least parts of sidewalls of the trench and a bottom surface of the trench, and a capping pattern on the etching stop layer to fill the trench, wherein the capping pattern includes silicon oxide or a low-k material having a lower permittivity than silicon oxide.

公开(公告)号：US20190157147A1

公开(公告)日：2019-05-23

申请号：US16237948

申请日：2019-01-02

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Sungwoo MYUNG ,  GeumJung SEONG ,  Jisoo OH ,  JinWook LEE ,  Dohyoung KIM ,  Yong-Ho JEON

IPC分类号： H01L21/768 ,  H01L29/78 ,  H01L23/535 ,  H01L29/66 ,  H01L27/088

CPC分类号： H01L21/76895 ,  H01L21/76805 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

摘要： A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.

公开(公告)号：US20170200802A1

公开(公告)日：2017-07-13

申请号：US15401562

申请日：2017-01-09

申请人： Samsung Electronics Co., Ltd.

发明人： Sungwoo MYUNG ,  GeumJung SEONG ,  Jisoo OH ,  JinWook LEE ,  Dohyoung KIM ,  Yong-Ho JEON

IPC分类号： H01L29/49 ,  H01L29/06 ,  H01L29/16 ,  H01L21/768 ,  H01L29/78 ,  H01L23/535 ,  H01L29/66 ,  H01L27/088 ,  H01L29/161

CPC分类号： H01L21/76895 ,  H01L21/76805 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

摘要： A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.

公开(公告)号：US20170103916A1

公开(公告)日：2017-04-13

申请号：US15182024

申请日：2016-06-14

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Yong-Ho JEON ,  Sang-Su KIM ,  Cheol KIM ,  Yong-Suk TAK ,  Myung-Geun SONG ,  Gi-Gwan PARK

IPC分类号： H01L21/768 ,  H01L29/08 ,  H01L29/161 ,  H01L29/16 ,  H01L29/49 ,  H01L29/78 ,  H01L23/535 ,  H01L21/8238 ,  H01L29/66 ,  H01L27/092 ,  H01L29/165

CPC分类号： H01L21/76897 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823475 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/823871 ,  H01L23/535 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7848

摘要： A semiconductor device, including a first fin-type pattern; a first gate spacer on the first fin-type pattern, intersecting the first fin-type pattern, and including an upper portion and a lower portion; a second gate spacer on the first fin-type pattern, intersecting the first fin-type pattern, and being spaced apart from the first gate spacer; a first trench defined by the first gate spacer and the second gate spacer; a first gate electrode partially filling the first trench; a first capping pattern on the first gate electrode and filling the first trench; and an interlayer insulating layer covering an upper surface of the capping pattern, a width of the upper portion of the first gate spacer decreasing as a distance from an upper surface of the first fin-type pattern increases, and an outer sidewall of the upper portion of the first gate spacer contacting the interlayer insulating layer.