公开(公告)号：US20210134785A1

公开(公告)日：2021-05-06

申请号：US17028855

申请日：2020-09-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JAEWAN YANG ,  WOOTAE KIM ,  HYUNGOCK KIM ,  SANGDO PARK ,  JUN SEOMUN

IPC: H01L27/02 ,  H01L23/522 ,  H01L27/088 ,  H01L21/768

Abstract: Disclosed are a semiconductor device and a method of fabricating the same. The method includes placing a standard cell, resizing a power via pattern in such a way that the power via pattern has a different width from a width of other via pattern, and applying different design rules to the power via pattern and the other via pattern, respectively, to perform a routing operation on the standard cell.

公开(公告)号：US20180210421A1

公开(公告)日：2018-07-26

申请号：US15867939

申请日：2018-01-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WOOTAE KIM ,  Hyung-Ock Kim ,  Jaehoon Kim ,  Naya Ha ,  Ki-Ok Kim ,  Eunbyeol Kim ,  Jung Yun Choi ,  Sun Ik Heo

IPC: G05B19/4097 ,  G06F17/50

CPC classification number: G05B19/4097 ,  G05B2219/45031 ,  G06F17/5072 ,  G06F2217/12 ,  Y02P90/265

Abstract: A method of manufacturing an integrated circuit (IC) including instances of standard cells includes arranging a first instance and arranging a second instance adjacent to the first instance. The second instance has a front-end layer pattern corresponding to a context group of the first instance. The context group includes information about front-end layer patterns of instances, the front-end layer patterns causing a same local layout effect (LLE) on the first instance and arranged adjacent to the first instance.