公开(公告)号：US20130212451A1

公开(公告)日：2013-08-15

申请号：US13764649

申请日：2013-02-11

申请人： STEC, Inc.

发明人： Majid NEMATI ANARAKI ,  Xinde HU ,  Richard D. BARNDT

IPC分类号： H03M13/05

CPC分类号： H03M13/458 ,  H03M13/05 ,  H03M13/1105 ,  H03M13/1111 ,  H03M13/1122 ,  H03M13/1128 ,  H03M13/114 ,  H03M13/1162 ,  H03M13/1171 ,  H03M13/255 ,  H03M13/615 ,  H03M13/6505

摘要： A custom decoding algorithm is introduced, in connection with a corresponding decoding structure, to resolve many complexity and large memory requirements of known decoders. A system. A variable node forms a confidence vector of four components, one component for each state of a memory cell, and passes the current primary component (e.g., the largest) to one or more check nodes. The check nodes calculate a temporary component and corresponding index based on all components received from the variable nodes, which they pass back to the respective variable nodes. The variable node updates the confidence vector based on the temporary nodes received from respective check nodes, and determines the correct state for corresponding memory cell based on which component in the confidence vector is currently the primary component.

摘要翻译： 引入定制解码算法，结合相应的解码结构，以解决已知解码器的许多复杂性和大的存储器要求。 一个系统。 变量节点形成四个分量的置信向量，一个分量用于存储器单元的每个状态，并将当前主要分量（例如，最大的）传递到一个或多个校验节点。 校验节点基于从变量节点接收到的所有组件计算临时组件和相应的索引，它们传回给相应的变量节点。 变量节点基于从相应校验节点接收到的临时节点更新置信向量，并且基于置信度向量中的哪个组件当前是主要组件来确定对应的存储器单元的正确状态。

公开(公告)号：US20130124945A1

公开(公告)日：2013-05-16

申请号：US13678416

申请日：2012-11-15

申请人： STEC, Inc.

发明人： Xinde HU ,  Richard D. Barndt

IPC分类号： H03M13/13

CPC分类号： G06F11/1048 ,  G06F11/1012 ,  G06F11/1072 ,  G06F11/108 ,  G06F2211/109 ,  H03M13/1102 ,  H03M13/13 ,  H03M13/255 ,  H03M13/6516

摘要： The subject technology includes adjusting an error correcting code rate in a solid-state drive. A first plurality of memory operations are performed on a flash memory device of the solid-state drive using a first code rate. During operation of the drive, a controller monitors an operating condition associated with one or more memory units of the flash memory device for a trigger event. On the trigger event, the first code rate is adjusted in accordance with the operating condition to produce a second code rate, and a second plurality of memory operations is performed on the flash memory device using the second code rate.

摘要翻译： 主题技术包括调整固态驱动器中的纠错码率。 使用第一码率在固态驱动器的闪存器件上执行第一多个存储器操作。 在驱动器的操作期间，控制器监视与闪存设备的一个或多个存储器单元相关联的操作条件以用于触发事件。 在触发事件中，根据操作条件调整第一码率以产生第二码率，并且使用第二码率对闪速存储设备执行第二多个存储器操作。