公开(公告)号：US20040004881A1

公开(公告)日：2004-01-08

申请号：US10190917

申请日：2002-07-08

Applicant: STMicroelectronics, Inc.

Inventor： Naren K. Sahoo

IPC: G11C007/02 ,  G11C005/00

CPC classification number: G11C7/067 ,  G11C11/419

Abstract: A sense amplifier circuit for a memory cell includes a sense amplifier that is operable to be coupled to a memory cell via data lines, and including read bus complement and read bus true lines operative with a data output through which a data output signal is passed. An equalization circuit and enable circuit are operable with the sense amplifier. A control circuit is operable for disconnecting the data output from preferably the one of the read bus complement line and minimize unwanted transitions on the data output signal.