Abstract:
A method for forming an integrated circuit including the steps of: forming electronic capponents on a first surface of a substrate; forming a stack of interconnection levels on the first surface, each interconnection level including conductive tracks separated by an insulating material; forming at least one hole from a second surface of the substrate, opposite to the first surface, the hole stopping on one of the conductive tracks; depositing, on the walls and the bottom of the hole, a conductive layer and filling the remaining space with a filling material; and forming, in an interconnection level or at the surface of the interconnection stack, and opposite to said at least one hole, at least one region of a material having a modulus of elasticity greater than 50 GPa and an elongation at break greater than 20%, insulated from the conductive tracks.