公开(公告)号：US10553499B2

公开(公告)日：2020-02-04

申请号：US15993922

申请日：2018-05-31

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Franck Julien ,  Frédéric Chairat ,  Noémie Blanc ,  Emmanuel Blot ,  Philippe Roux ,  Gerald Theret

IPC: H01L21/8238 ,  H01L21/02 ,  H01L21/84 ,  H01L27/092 ,  H01L21/3115 ,  H01L21/762 ,  H01L21/306 ,  H01L29/06 ,  H01L27/12 ,  H01L27/11521

Abstract: A method can be used for fabricating first and second semiconductor regions separated by isolating trenches. A semiconductor substrate is covered with silicon nitride. The silicon nitride situated above the first region is doped by ion implantation. Trenches are etched through the silicon nitride and the doped silicon nitride is partially etching in an isotropic manner. The trenches are filled with an insulator to a level situated above that of the first region. The silicon nitride is removed resulting in the edges of the first region only being covered with an insulator annulus.

公开(公告)号：US11121042B2

公开(公告)日：2021-09-14

申请号：US16739592

申请日：2020-01-10

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Franck Julien ,  Frédéric Chairat ,  Noémie Blanc ,  Emmanuel Blot ,  Philippe Roux ,  Gerald Theret

IPC: H01L21/8238 ,  H01L21/02 ,  H01L21/84 ,  H01L27/092 ,  H01L21/3115 ,  H01L21/762 ,  H01L21/306 ,  H01L29/06 ,  H01L27/12 ,  H01L21/311 ,  H01L27/11521

Abstract: A method can be used for fabricating first and second semiconductor regions separated by isolating trenches. A semiconductor substrate is covered with silicon nitride. The silicon nitride situated above the first region is doped by ion implantation. Trenches are etched through the silicon nitride and the doped silicon nitride is partially etching in an isotropic manner. The trenches are filled with an insulator to a level situated above that of the first region. The silicon nitride is removed resulting in the edges of the first region only being covered with an insulator annulus.

公开(公告)号：US20200152523A1

公开(公告)日：2020-05-14

申请号：US16739592

申请日：2020-01-10

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Franck Julien ,  Frédéric Chairat ,  Noémie Blanc ,  Emmanuel Blot ,  Philippe Roux ,  Gerald Theret

IPC: H01L21/8238 ,  H01L27/12 ,  H01L29/06 ,  H01L21/306 ,  H01L21/762 ,  H01L21/3115 ,  H01L27/092 ,  H01L21/84 ,  H01L21/02 ,  H01L21/311

Abstract: A method can be used for fabricating first and second semiconductor regions separated by isolating trenches. A semiconductor substrate is covered with silicon nitride. The silicon nitride situated above the first region is doped by ion implantation. Trenches are etched through the silicon nitride and the doped silicon nitride is partially etching in an isotropic manner. The trenches are filled with an insulator to a level situated above that of the first region. The silicon nitride is removed resulting in the edges of the first region only being covered with an insulator annulus.

公开(公告)号：US20180358270A1

公开(公告)日：2018-12-13

申请号：US15993922

申请日：2018-05-31

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Franck Julien ,  Frédéric Chairat ,  Noémie Blanc ,  Emmanuel Blot ,  Philippe Roux ,  Gerald Theret

IPC: H01L21/8238 ,  H01L21/02 ,  H01L21/84 ,  H01L27/092 ,  H01L27/12 ,  H01L21/3115 ,  H01L21/762 ,  H01L21/306 ,  H01L29/06

Abstract: A method can be used for fabricating first and second semiconductor regions separated by isolating trenches. A semiconductor substrate is covered with silicon nitride. The silicon nitride situated above the first region is doped by ion implantation. Trenches are etched through the silicon nitride and the doped silicon nitride is partially etching in an isotropic manner. The trenches are filled with an insulator to a level situated above that of the first region. The silicon nitride is removed resulting in the edges of the first region only being covered with an insulator annulus.