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公开(公告)号：US08953290B2
公开(公告)日：2015-02-10
申请号：US13955112
申请日：2013-07-31
Applicant: STMicroelectronics (Tours) SAS
Inventor： Olivier Ory , Eric Laconde
CPC classification number: H01L23/62 , H01L27/0255 , H01L2924/0002 , H01L2924/00
Abstract: A device for protecting an integrated circuit against overvoltages, the device being formed inside and on top of a semiconductor substrate of a first conductivity type and including: a capacitor including a well of the second conductivity type penetrating into the substrate and trenches with insulated walls formed in the well and filled with a conductive material; and a zener diode formed by the junction between the substrate and the well.
Abstract translation: 一种用于保护集成电路免受过电压的装置，该装置形成在第一导电类型的半导体衬底的内部和顶部，并且包括：电容器，包括穿透到衬底中的第二导电类型的阱和形成有绝缘壁的沟槽 在井中充满导电材料; 以及由衬底和阱之间的接合部形成的齐纳二极管。
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公开(公告)号：US11437365B2
公开(公告)日：2022-09-06
申请号：US16834329
申请日：2020-03-30
Applicant: STMicroelectronics (Tours) SAS
Inventor： Eric Laconde , Olivier Ory
IPC: H01L27/02 , H01L29/866 , H01L29/87
Abstract: A semiconductor substrate of a first conductivity type is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is formed an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are provided in the semiconductor layer. A second region of the second conductivity type is formed in the first well. A third region of the second conductivity type is formed in the second well. The first well, the semiconducting layer, the second well and the third region form a first lateral thyristor. The second well, the semiconductor layer, the first well and the second region form a second lateral thyristor. The buried region and semiconductor substrate form a zener diode which sets the trigger voltage for the lateral thyristors.
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公开(公告)号：US11296071B2
公开(公告)日：2022-04-05
申请号：US16834499
申请日：2020-03-30
Applicant: STMicroelectronics (Tours) SAS
Inventor： Eric Laconde , Olivier Ory
Abstract: A device of protection against electrostatic discharges is formed in a semiconductor substrate of a first conductivity type that is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is positioned at an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are formed in the semiconductor layer and a region of the second conductivity type is formed in the second well. A stop channel region of the second conductivity type is provided in the semiconductor layer to laterally separating the first well from the second well, where no contact is present between this stop channel region and either of the first and second wells.
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公开(公告)号：US20140036399A1
公开(公告)日：2014-02-06
申请号：US13955112
申请日：2013-07-31
Applicant: STMicroelectronics (Tours) SAS
Inventor： Olivier Ory , Eric Laconde
IPC: H01L23/62
CPC classification number: H01L23/62 , H01L27/0255 , H01L2924/0002 , H01L2924/00
Abstract: A device for protecting an integrated circuit against overvoltages, the device being formed inside and on top of a semiconductor substrate of a first conductivity type and including: a capacitor including a well of the second conductivity type penetrating into the substrate and trenches with insulated walls formed in the well and filled with a conductive material; and a zener diode formed by the junction between the substrate and the well.
Abstract translation: 一种用于保护集成电路免受过电压的装置，该装置形成在第一导电类型的半导体衬底的内部和顶部，并且包括：电容器，包括穿透到衬底中的第二导电类型的阱和形成有绝缘壁的沟槽 在井中充满导电材料; 以及由衬底和阱之间的接合部形成的齐纳二极管。
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