公开(公告)号：US20240290364A1

公开(公告)日：2024-08-29

申请号：US18441110

申请日：2024-02-14

Applicant: STMicroelectronics International N.V.

Inventor： Leonardo VALENCIA RISSETTO ,  Alin RAZAFINDRAIBE ,  Xavier LECOQ ,  Christophe FOREL

IPC: G11C7/22 ,  G11C7/10

CPC classification number: G11C7/222 ,  G11C7/1063 ,  G11C7/1066

Abstract: A device includes memory cells wherein each memory cell has a control input that receives a pulse-width modulated control voltage and an output that delivers a current depending on the control voltage and on a weight programmed in the memory cell. A node receives, during a first time period, the currents of the memory cells. A first circuit delivers an output determined by a total quantity of current received by the node during the first time period. For each memory cell, a second circuit receives a digital word and delivers, during the first time period, the pulse-width modulated control voltage at a first level only during a second time period determined by the digital word.