公开(公告)号：US11923855B2

公开(公告)日：2024-03-05

申请号：US17931864

申请日：2022-09-13

Applicant: STMicroelectronics International N.V.

Inventor： Manoj Kumar Tiwari ,  Saiyid Mohammad Irshad Rizvi

IPC: H03K3/00 ,  H03K3/037 ,  H03K3/13

CPC classification number: H03K3/0377 ,  H03K3/037 ,  H03K3/13

Abstract: An integrated circuit includes an input pad and a Schmitt trigger coupled to the input pad. The Schmitt trigger includes a first inverter and a second inverter. The Schmitt trigger includes a pull-up transistor coupled to an input of the second inverter and configure to supply a high reference voltage to the input of the second inverter.

公开(公告)号：US11522521B2

公开(公告)日：2022-12-06

申请号：US17223963

申请日：2021-04-06

Applicant: STMicroelectronics International N.V.

Inventor： Manoj Kumar Tiwari ,  Saiyid Mohammad Irshad Rizvi

IPC: H03H11/04 ,  H03H19/00 ,  G06F1/10

Abstract: A glitch filter is provided. The glitch filter receives an input signal and sets a voltage level of an intermediary input node in accordance with a state of the input signal. The glitch filter charges or discharges a switched capacitance based on the voltage level of the intermediary input node and charges or discharges a filter capacitance based on a charge of the switched capacitance. The glitch filter sets a state of an output signal based on the charge of the filter capacitance. The glitch filter includes a reset stage that at least partially filters a burst of glitches in the input signal from the output signal by controlling the charge of the switched capacitance based on the state of the input signal and the state of the output signal.