SWITCHED MODE POWER SUPPLY PEAK-EFFICIENCY DETECTION
    1.
    发明申请
    SWITCHED MODE POWER SUPPLY PEAK-EFFICIENCY DETECTION 有权
    切换模式电源峰值效率检测

    公开(公告)号:US20150108956A1

    公开(公告)日:2015-04-23

    申请号:US14518039

    申请日:2014-10-20

    Inventor: Vratislav Michal

    Abstract: A peak efficiency detection system may include a switched power supply (SPS) module providing an output supply signal. The SPS module may have an internal node, and a plurality of SPS circuits configured to generate the output supply signal on the internal node. A dead type module may generate control signals. A central node external to the SPS module may deliver the output supply signal to a load module. A power stage size control module may generate control signals for controlling the SPS module. A peak-efficiency detection (PED) module may receive the output supply signal from the central node, the control signals from the SPS module, and the control signals from the power stage size control module. The PED module may generate a signal representative of an efficiency of the SPS module.

    Abstract translation: 峰值效率检测系统可以包括提供输出电源信号的开关电源(SPS)模块。 SPS模块可以具有内部节点,并且多个SPS电路被配置为在内部节点上生成输出电源信号。 死机模块可以产生控制信号。 SPS模块外部的中心节点可将输出电源信号传送到负载模块。 功率级尺寸控制模块可以产生用于控制SPS模块的控制信号。 峰值效率检测(PED)模块可以接收来自中央节点的输出电源信号,来自SPS模块的控制信号和来自功率级尺寸控制模块的控制信号。 PED模块可以产生表示SPS模块的效率的信号。

    Switched mode power supply peak-efficiency detection
    3.
    发明授权
    Switched mode power supply peak-efficiency detection 有权
    开关电源峰值效率检测

    公开(公告)号:US09537395B2

    公开(公告)日:2017-01-03

    申请号:US14518039

    申请日:2014-10-20

    Inventor: Vratislav Michal

    Abstract: A peak efficiency detection system may include a switched power supply (SPS) module providing an output supply signal. The SPS module may have an internal node, and a plurality of SPS circuits configured to generate the output supply signal on the internal node. A dead type module may generate control signals. A central node external to the SPS module may deliver the output supply signal to a load module. A power stage size control module may generate control signals for controlling the SPS module. A peak-efficiency detection (PED) module may receive the output supply signal from the central node, the control signals from the SPS module, and the control signals from the power stage size control module. The PED module may generate a signal representative of an efficiency of the SPS module.

    Abstract translation: 峰值效率检测系统可以包括提供输出电源信号的开关电源(SPS)模块。 SPS模块可以具有内部节点,并且多个SPS电路被配置为在内部节点上生成输出电源信号。 死机模块可以产生控制信号。 SPS模块外部的中心节点可将输出电源信号传送到负载模块。 功率级尺寸控制模块可以产生用于控制SPS模块的控制信号。 峰值效率检测(PED)模块可以接收来自中央节点的输出电源信号,来自SPS模块的控制信号和来自功率级尺寸控制模块的控制信号。 PED模块可以产生表示SPS模块的效率的信号。

    METHOD OF VALLEY INDUCTANCE CURRENT POLARITY DETECTION IN A PULSE WIDTH MODULATED CIRCUIT WITH AN INDUCTIVE CHARGE
    4.
    发明申请
    METHOD OF VALLEY INDUCTANCE CURRENT POLARITY DETECTION IN A PULSE WIDTH MODULATED CIRCUIT WITH AN INDUCTIVE CHARGE 有权
    具有电感充电脉冲宽度调制电路中谷状电感电流极性检测方法

    公开(公告)号:US20140375332A1

    公开(公告)日:2014-12-25

    申请号:US14306489

    申请日:2014-06-17

    Inventor: Vratislav Michal

    Abstract: A valley inductance current polarity change in a pulse width modulated circuit charged with an inductive charge is detected by comparing respective times that a first output of the circuit charged with an inductive charge and a second output of a pulse width modulated reference circuit with no inductive charge reach an output level. Responsive thereto, control over operation of the pulse width modulated circuit charged with an inductive charge is made with respect to switching to a pulse skipping mode of operation or keeping the pulse width modulation mode of operation.

    Abstract translation: 通过比较充电感应电荷的电路的第一输出和脉冲宽度调制的参考电路的第二输出的感应电荷的电荷电流的波谷电感电流极性变化, 达到输出水平。 响应于此,对切换到脉冲跳过操作模式或保持脉冲宽度调制操作模式进行充电感应电荷的脉冲宽度调制电路的操作的控制。

    CIRCUIT FOR VOLTAGE OFFSET COMPENSATION

    公开(公告)号:US20250023531A1

    公开(公告)日:2025-01-16

    申请号:US18352034

    申请日:2023-07-13

    Inventor: Vratislav Michal

    Abstract: A circuit includes a current source, a differential pair of transistors coupled to the current source, an active load, and a current injection circuit. The differential pair of transistors has a first offset voltage and an input transconductance. The current injection circuit is configured to supply a first current and a second current to produce a second offset voltage across the differential pair of transistors opposite the first offset voltage. The first current and the second current has a same thermal dependence as the input transconductance of the differential pair of transistors.

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