公开(公告)号：US20210336047A1

公开(公告)日：2021-10-28

申请号：US17217689

申请日：2021-03-30

Applicant: STMicroelectronics Pte Ltd

Inventor： Shin Phay LEE ,  Voon Cheng NGWAN ,  Maurizio Gabriele CASTORINA

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L21/765 ,  H01L29/66

Abstract: An integrated circuit includes a MOSFET device and a monolithic diode device, wherein the monolithic diode device is electrically connected in parallel with a body diode of the MOSFET device. The monolithic diode device is configured so that a forward voltage drop VfD2 of the monolithic diode device is less than a forward voltage drop VfD1 of the body diode of the MOSFET device. The forward voltage drop VfD2 is process tunable by controlling a gate oxide thickness, a channel length and body doping concentration level. The tunability of the forward voltage drop VfD2 advantageously permits design of the integrated circuit to suit a wide range of applications according to requirements of switching speed and efficiency.

公开(公告)号：US20220393022A1

公开(公告)日：2022-12-08

申请号：US17730895

申请日：2022-04-27

Applicant: STMicroelectronics PTE LTD ,  STMicroelectronics (Tours) SAS

Inventor： Shin Phay LEE ,  Voon Cheng NGWAN ,  Frederic LANOIS ,  Fadhillawati TAHIR ,  Ditto ADNAN

IPC: H01L29/739 ,  H01L29/40 ,  H01L29/66

Abstract: A trench in a semiconductor substrate is lined with a first insulation layer. A hard mask layer deposited on the first insulation layer is used to control performance of an etch that selectively removes a first portion of the first insulating layer from an upper trench portion while leaving a second portion of first insulating layer in a lower trench portion. After removing the hard mask layer, an upper portion of the trench is lined with a second insulation layer. An opening in the trench that includes a lower open portion delimited by the second portion of first insulating layer in the lower trench portion and an upper open portion delimited by the second insulation layer at the upper trench portion, is then filled by a single deposition of polysilicon material forming a unitary gate/field plate conductor of a field effect rectifier diode.