Efficient latch array initialization
    1.
    发明申请
    Efficient latch array initialization 有权
    高效的锁存器阵列初始化

    公开(公告)号:US20030223298A1

    公开(公告)日:2003-12-04

    申请号:US10377297

    申请日:2003-02-28

    Abstract: An efficient method and electronic circuit for initializing latch arrays in an electronic device including an FPGA and a memory device comprising a group of one or more data latches, each comprising a pair of cross-coupled inverting logic elements, characterized in that it includes a means for simultaneously initializing each data latch to a predetermined logic state, without requiring any additional circuit elements with any data latch for this purpose.

    Abstract translation: 一种用于在包括FPGA的电子设备中初始化锁存器阵列的有效方法和电子电路,以及包括一组一个或多个数据锁存器的存储器件,每个数据锁存器包括一对交叉耦合的反相逻辑元件,其特征在于, 用于同时将每个数据锁存器初始化为预定的逻辑状态,而不需要任何额外的电路元件与任何数据锁存器用于此目的。

    Rapid partial configuration of reconfigurable devices
    2.
    发明申请
    Rapid partial configuration of reconfigurable devices 有权
    可重构设备的快速部分配置

    公开(公告)号:US20030145193A1

    公开(公告)日:2003-07-31

    申请号:US10319436

    申请日:2002-12-13

    CPC classification number: G06F17/5054

    Abstract: A system and method for enabling rapid partial configuration of reconfigurable devices, wherein configuration definition means define partial configuration requirements, and contain at least a starting address of configuration data for the partial reconfiguration, data size specifying the number of contiguous locations to be reconfigured, and desired configuration data corresponding to the contiguous locations. Configuration loading means provides for loading the configuration data into the reconfigurable device according to the partial configuration requirements.

    Abstract translation: 一种用于实现可重构设备的快速部分配置的系统和方法,其中配置定义装置定义部分配置要求,并且至少包含用于部分重配置的配置数据的起始地址,指定要重新配置的连续位置的数量的数据大小,以及 对应于相邻位置的所需配置数据。 配置加载手段提供根据部分配置要求将配置数据加载到可重配置设备中。

Patent Agency Ranking