Method of handling branching instructions within a processor, in particular a processor for digital signal processing, and corresponding processor
    1.
    发明申请
    Method of handling branching instructions within a processor, in particular a processor for digital signal processing, and corresponding processor 有权
    在处理器内处理分支指令的方法,特别是用于数字信号处理的处理器和对应的处理器

    公开(公告)号:US20020124044A1

    公开(公告)日:2002-09-05

    申请号:US10082816

    申请日:2002-02-25

    CPC classification number: G06F9/3804 G06F9/30094 G06F9/3836 G06F9/3842

    Abstract: A processor includes a program memory containing program instructions, and a processor core including several processing units and a central unit. The central unit, upon receipt of a program instruction, issues corresponding instructions to the various processing units. The processor core is clocked by a clock signal. A branching instruction received by the central unit, in the course of a current cycle, is processed in the course of the current cycle.

    Abstract translation: 处理器包括包含程序指令的程序存储器和包括若干处理单元和中央单元的处理器核心。 中央单元在接收到程序指令时,向各种处理单元发出相应的指令。 处理器内核由时钟信号计时。 在当前周期的过程中,由中央单元接收的分支指令在当前周期的过程中被处理。

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