公开(公告)号：US20040119137A1

公开(公告)日：2004-06-24

申请号：US10729721

申请日：2003-12-05

Applicant: STMicroelectronics S.r.l.

Inventor： Salvatore Leonardi ,  Roberto Modica

IPC: H01L029/00

CPC classification number: H01L28/20 ,  H01L27/0802

Abstract: A resistive structure integrated in a semiconductor substrate and having a suitably doped polysilicon region that is completely surrounded by a dielectric region so that the resistive structure is isolated electrically from other components jointly integrated in the semiconductor substrate.

Abstract translation: 一种电阻结构，其集成在半导体衬底中并且具有完全被介电区域包围的适当掺杂的多晶硅区域，使得该电阻结构与联合地集成在该半导体衬底中的其它部件电隔离。

公开(公告)号：US20040026761A1

公开(公告)日：2004-02-12

申请号：US10444102

申请日：2003-05-22

Applicant: STMicroelectronics S.r.l.

Inventor： Salvatore Leonardi ,  Roberto Modica ,  Giuseppe Arena

IPC: H01L029/00

CPC classification number: H01L21/76264 ,  H01L21/76283

Abstract: A dielectric insulation structure is formed in a silicon layer by integrating a dielectric trench structure therein. The dielectric trench structure defines an insulation well where semiconductor devices are to be integrated therein. The dielectric trench structure is on a hollow region that is completely surrounded by a dielectric area. The dielectric area also forms the side insulation of the dielectric trench structure. The dielectric trench structure is interrupted by a plurality of points to define a plurality of side support regions for the insulation well.

Abstract translation: 通过在其中集成介电沟槽结构，在硅层中形成介电绝缘结构。 电介质沟槽结构限定了将半导体器件集成在其中的绝缘阱。 电介质沟槽结构在完全被电介质区域包围的中空区域上。 电介质区域也形成电介质沟槽结构的侧绝缘体。 电介质沟槽结构被多个点中断，以限定用于绝缘阱的多个侧支撑区域。