Efficient analog layout prototyping by layout reuse with routing preservation

    公开(公告)号:US10409943B2

    公开(公告)日:2019-09-10

    申请号:US14475276

    申请日:2014-09-02

    Applicant: SYNOPSYS, INC.

    Abstract: A computer implemented method for routing preservation is presented. The method includes decomposing, using the computer, a geometric relationship between a first module, a second module, and a routing path of a source layout, when the computer is invoked to route the solution path. The method further includes disposing, using the computer, the routing path in a solution layout in accordance with the geometric relationship. The solution layout is not defined by a scaling of the source layout.

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