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公开(公告)号:US20240420641A1
公开(公告)日:2024-12-19
申请号:US18815757
申请日:2024-08-26
Applicant: Samsung Display Co., Ltd.
Inventor: Haijung In , Chulkyu Kang , Soongi Kwon , Minjeong Kim , Kimyeong Eom
IPC: G09G3/3258
Abstract: A driver includes a stage that includes a first controller, a second controller, and a first output unit. The first controller controls a voltage level of a first node. The second controller controls voltage levels of a second node and a third node to be equal to the voltage level of a first node or an opposite voltage level of the voltage level of the first node, and controls a voltage level of a fifth node to be equal to the opposite voltage level of the voltage level of the first node. The first output unit may output a gate control signal, which has a first voltage when the second node and the third node is in an on-voltage level state, and has a second voltage when the fifth node is in an on-voltage level state.
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公开(公告)号:US11996051B2
公开(公告)日:2024-05-28
申请号:US18106431
申请日:2023-02-06
Applicant: Samsung Display Co., Ltd.
Inventor: Ji-Hyun Ka , Nackhyeon Keum , Kimyeong Eom
IPC: G09G3/3258 , G09G3/3266 , G09G3/3291
CPC classification number: G09G3/3258 , G09G3/3291 , G09G3/3266 , G09G2300/0876
Abstract: A display panel of an OLED display device includes a first pixel configured to emit first color light, a second pixel configured to emit second color light, and a third pixel configured to emit third color light. Each of the first, second and third pixels includes at least two transistors, at least one capacitor and an organic light emitting diode. At least one of at least two transistors or at least one capacitor included in the third pixel has a size different from a size of a corresponding one at least two transistors or at least one capacitor included in the first pixel or the second pixel.
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公开(公告)号:US11430858B2
公开(公告)日:2022-08-30
申请号:US16294306
申请日:2019-03-06
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Hwayoung Song , Jihyun Ka , Kimyeong Eom , Kwangsae Lee
IPC: H01L27/32
Abstract: A display panel includes a substrate including a first non-display area surrounding a transmission area, a display area on an outer portion of the first non-display area, and a second non-display area surrounding the display area, driving thin film transistors and display elements in the display area, a first power supply line in the second non-display area and extending in a first direction, first driving voltage lines and second driving voltage lines extending in a second direction intersecting with the first direction and spaced apart from each other with the transmission area therebetween, and a power bus line connected to the second driving voltage lines in the first non-display area or second non-display area, the power bus line extending in the first direction. A length of the power bus line in the first direction is less than a length of the first power supply line in the first direction.
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公开(公告)号:US20240412697A1
公开(公告)日:2024-12-12
申请号:US18813017
申请日:2024-08-23
Applicant: Samsung Display Co., Ltd.
Inventor: Nackhyeon Keum , Kimyeong Eom , Kwangsae Lee
IPC: G09G3/3266
Abstract: Provided is a gate driver including a plurality of stages, wherein each stage includes an output unit including a pull-up transistor and a pull-down transistor, and a second node controller configured to control a voltage of a second control node to which a gate of the pull-up transistor is connected, wherein the second node controller includes a first control transistor connected between the first clock terminal and the second control node and including a gate connected to the first control node, and a second control transistor including a gate connected to the gate of the first control transistor and configured to control a short circuit between the first clock terminal and a second clock terminal.
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公开(公告)号:US11922886B2
公开(公告)日:2024-03-05
申请号:US18137348
申请日:2023-04-20
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Haijung In , Wonkyu Kwak , Kimyeong Eom
IPC: G09G3/3266
CPC classification number: G09G3/3266
Abstract: According to an embodiment, a scan driver includes a plurality of stages. An output controller of each of the stages includes a pull-down transistor, and the pull-down transistor includes a first gate and a second gate, where the first gate is electrically connected to a third control node or a node electrically connected to the third control node, and the second gate is connected to a third voltage input terminal to which a third voltage of a second voltage level is applied.
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公开(公告)号:US20230335062A1
公开(公告)日:2023-10-19
申请号:US18128956
申请日:2023-03-30
Applicant: Samsung Display Co., Ltd.
Inventor: Haijung In , Chulkyu Kang , Kimyeong Eom , Soongi Kwon , Minjeong Kim
IPC: G09G3/3266 , G09G3/3258
CPC classification number: G09G3/3266 , G09G3/3258 , G09G2310/0286 , G09G2310/08 , G09G2320/0223
Abstract: A scan driver includes a stage, wherein the stage includes: a first output controller including a first pull-up transistor and a first pull-down transistor, wherein the first pull-up transistor has a gate connected to a first control node, and the first pull-down transistor has a gate connected to a second control node; a second output controller including a second pull-up transistor and a second pull-down transistor, wherein the second pull-up transistor has a gate connected to the first control node, and the second pull-down transistor has a gate connected to the second control node; and a stabilizer configured to maintain the first control node at an off-voltage level based on the second control node being at an on-voltage level.
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公开(公告)号:US20230140806A1
公开(公告)日:2023-05-04
申请号:US17748926
申请日:2022-05-19
Applicant: Samsung Display Co., Ltd.
Inventor: Haijung In , Chulkyu Kang , Soongi Kwon , Minjeong Kim , Kimyeong Eom
IPC: G09G3/3258
Abstract: A driver includes a stage that includes a first controller, a second controller, and a first output unit. The first controller controls a voltage level of a first node. The second controller controls voltage levels of a second node and a third node to be equal to the voltage level of a first node or an opposite voltage level of the voltage level of the first node, and controls a voltage level of a fifth node to be equal to the opposite voltage level of the voltage level of the first node. The first output unit may output a gate control signal, which has a first voltage when the second node and the third node is in an on-voltage level state, and has a second voltage when the fifth node is in an on-voltage level state.
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公开(公告)号:US11348989B2
公开(公告)日:2022-05-31
申请号:US16909032
申请日:2020-06-23
Applicant: Samsung Display Co., Ltd.
Inventor: Kwangsae Lee , Ji-Hyun Ka , Kimyeong Eom
Abstract: An electronic panel including: a base substrate including a first area and a second area, wherein the first area includes a module area and a display area adjacent to the module area; a display element layer including a plurality of display elements, wherein the plurality of display elements overlaps the first area; an encapsulation layer configured to cover the display elements; sensing patterns overlapping the first area and disposed on the encapsulation layer; a crack sensing pattern overlapping the module area and disposed on the encapsulation layer; an auxiliary pattern overlapping the module area and disposed on the encapsulation layer, wherein the auxiliary pattern has a shape that extends along an edge of the crack sensing pattern and extends between the sensing patterns and the crack sensing pattern; and a signal line disposed on the encapsulation layer to electrically connect the crack sensing pattern to the auxiliary pattern.
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公开(公告)号:US12165553B2
公开(公告)日:2024-12-10
申请号:US18095097
申请日:2023-01-10
Applicant: Samsung Display Co., LTD.
Inventor: Hai-Jung In , Chulkyu Kang , Kimyeong Eom , Soon-Gi Kwon , Min Jeong Kim
IPC: G09G3/20
Abstract: A gate driver includes: a pull-up circuit configured to pull up a gate output signal to a high voltage in response to a signal at a first node of the pull-up circuit; a first pull-down circuit configured to pull down the gate output signal to a low voltage in response to a signal at a second node of the first pull-down circuit; a second pull-down circuit configured to pull down the gate output signal to the low voltage in response to a signal at a third node of the second pull-down circuit; a first selection circuit configured to activate the first pull-down circuit and deactivate the second pull-down circuit based on a first selection signal; and a second selection circuit configured to activate the second pull-down circuit and deactivate the first pull-down circuit based on a second selection signal.
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公开(公告)号:US12073791B2
公开(公告)日:2024-08-27
申请号:US17748926
申请日:2022-05-19
Applicant: Samsung Display Co., Ltd.
Inventor: Haijung In , Chulkyu Kang , Soongi Kwon , Minjeong Kim , Kimyeong Eom
IPC: G09G3/3258
CPC classification number: G09G3/3258 , G09G2300/0426 , G09G2310/08
Abstract: A driver includes a stage that includes a first controller, a second controller, and a first output unit. The first controller controls a voltage level of a first node. The second controller controls voltage levels of a second node and a third node to be equal to the voltage level of a first node or an opposite voltage level of the voltage level of the first node, and controls a voltage level of a fifth node to be equal to the opposite voltage level of the voltage level of the first node. The first output unit may output a gate control signal, which has a first voltage when the second node and the third node is in an on-voltage level state, and has a second voltage when the fifth node is in an on-voltage level state.
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