公开(公告)号：US09536908B2

公开(公告)日：2017-01-03

申请号：US14799995

申请日：2015-07-15

Applicant: Samsung Display Co., Ltd.

Inventor： Yung Bin Chung ,  Chul-Hyun Baek ,  Eun Jeong Cho ,  Jung Yun Jo

IPC: H01L27/14 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L29/417 ,  H01L21/02

CPC classification number: H01L27/124 ,  H01L21/0217 ,  H01L27/1248 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78606 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin-film transistor array panel includes an insulation substrate, a gate line disposed on the insulation substrate, a gate insulating layer disposed on the gate line, a semiconductor layer disposed on the gate insulating layer, a data line disposed on the semiconductor layer and including a source electrode, a drain electrode disposed on the semiconductor layer and facing the source electrode, a first electrode disposed on the gate insulating layer, a first passivation layer disposed on the first electrode and including silicon nitride, a second passivation layer disposed on the first passivation and including silicon nitride, and a second electrode disposed on the passivation layer, in which a first ratio of nitrogen-hydrogen bonds to silicon-hydrogen bonds in the first passivation layer is different from a second ratio of nitrogen-hydrogen bonds to silicon-hydrogen bonds in the second passivation layer.

Abstract translation: 薄膜晶体管阵列面板包括绝缘基板，设置在绝缘基板上的栅极线，设置在栅极线上的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线，以及 包括源电极，设置在半导体层上并面对源电极的漏电极，设置在栅绝缘层上的第一电极，设置在第一电极上并包括氮化硅的第一钝化层，设置在第一电极上的第二钝化层 第一钝化并且包括氮化硅，以及设置在钝化层上的第二电极，其中第一钝化层中氮 - 氢键与硅 - 氢键的第一比例不同于氮 - 氢键与硅的第二比率 在第二钝化层中的氢键。

公开(公告)号：US09406704B1

公开(公告)日：2016-08-02

申请号：US14799995

申请日：2015-07-15

Applicant: Samsung Display Co., Ltd.

Inventor： Yung Bin Chung ,  Chul-Hyun Baek ,  Eun Jeong Cho ,  Jung Yun Jo

IPC: H01L27/14 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L29/417 ,  H01L21/02

Abstract: A thin-film transistor array panel includes an insulation substrate, a gate line disposed on the insulation substrate, a gate insulating layer disposed on the gate line, a semiconductor layer disposed on the gate insulating layer, a data line disposed on the semiconductor layer and including a source electrode, a drain electrode disposed on the semiconductor layer and facing the source electrode, a first electrode disposed on the gate insulating layer, a first passivation layer disposed on the first electrode and including silicon nitride, a second passivation layer disposed on the first passivation and including silicon nitride, and a second electrode disposed on the passivation layer, in which a first ratio of nitrogen-hydrogen bonds to silicon-hydrogen bonds in the first passivation layer is different from a second ratio of nitrogen-hydrogen bonds to silicon-hydrogen bonds in the second passivation layer.