公开(公告)号：US20240258323A1

公开(公告)日：2024-08-01

申请号：US18631351

申请日：2024-04-10

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE

IPC分类号： H01L27/12 ,  H01L21/02 ,  H01L27/088 ,  H01L29/04 ,  H01L29/24 ,  H01L29/49 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L27/0883 ,  H01L27/1251 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/045 ,  H01L29/24 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696 ,  H01L21/02603 ,  H01L29/04 ,  H01L29/4908 ,  H01L2924/13069

摘要： An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.

公开(公告)号：US11997847B2

公开(公告)日：2024-05-28

申请号：US17588938

申请日：2022-01-31

申请人： Intel Corporation

发明人： Abhishek A. Sharma ,  Van H. Le ,  Gilbert Dewey ,  Shriram Shivaraman ,  Yih Wang ,  Tahir Ghani ,  Jack T. Kavalieros

IPC分类号： H01L29/417 ,  H01L29/45 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66 ,  H01L29/786 ,  H10B12/00

CPC分类号： H10B12/30 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/6656 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78669 ,  H01L29/78693 ,  H10B12/05

摘要： Embodiments herein describe techniques for a semiconductor device including a TFT having a gate electrode with a gate length determined by a spacer. Embodiments may include a gate electrode above a substrate, a channel layer above the gate electrode, and a source electrode, a drain electrode, and a spacer above the channel layer. The drain electrode may be separated from the source electrode by the spacer. The drain electrode and the source electrode may have different widths or include different materials. Furthermore, the spacer may overlap with the gate electrode, hence the gate length of the gate electrode may be determined by the spacer width. Other embodiments may be described and/or claimed.

公开(公告)号：US11978804B2

公开(公告)日：2024-05-07

申请号：US17496690

申请日：2021-10-07

申请人： Intel Corporation

发明人： Abhishek A. Sharma ,  Van H. Le ,  Jack T. Kavalieros ,  Tahir Ghani ,  Yih Wang

IPC分类号： H01L29/786 ,  H01L23/528 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H10B12/00

CPC分类号： H01L29/78618 ,  H01L23/528 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78684 ,  H01L29/7869 ,  H01L29/78696 ,  H10B12/05 ,  H10B12/315 ,  H10B12/482 ,  H10B12/488 ,  H10B12/50

摘要： A thin-film transistor includes a gate electrode, a gate dielectric on the gate electrode, a first layer including a source region, a drain region, and a semiconductor region above and in direct contact with the gate dielectric and physically connecting the source and drain regions, and a second layer including an insulator material on the semiconductor region. The semiconductor region has less vertical thickness than the source and drain regions. In an embodiment, the thickness of the semiconductor region is no more than half that of the source and drain regions. In another embodiment, the second layer physically connects and electrically separates the source and drain regions. In yet another embodiment, a memory cell includes this transistor and a capacitor electrically connected to the drain region, the gate electrode being electrically connected to a wordline and the source region being electrically connected to a bitline.

公开(公告)号：US11916080B2

公开(公告)日：2024-02-27

申请号：US17984061

申请日：2022-11-09

申请人： Innolux Corporation

发明人： May Pan

IPC分类号： H01L27/12 ,  H01L29/786 ,  G02F1/1368 ,  G02F1/1362

CPC分类号： H01L27/1222 ,  G02F1/1368 ,  G02F1/13685 ,  G02F1/136281 ,  G02F1/136286 ,  H01L29/78669 ,  H01L29/78696 ,  G02F2202/103 ,  G02F2202/28

摘要： A driving substrate is provided. The driving substrate includes a substrate and a thin film transistor disposed on the substrate. The thin film transistor includes a first metal layer, a second metal layer, and a semiconductor disposed between the first metal layer and the second metal layer. The thin film transistor is divided into a first active block and a second active block, the first active block and the second active block are separated by a first gap in a first direction, and the first active block and the second active block are connected by a first bridge.

公开(公告)号：US11764308B2

公开(公告)日：2023-09-19

申请号：US17171602

申请日：2021-02-09

申请人： SAKAI DISPLAY PRODUCTS CORPORATION

发明人： Hiroyuki Ohta ,  Shogo Sako ,  Hisayuki Katoh

IPC分类号： H01L29/786 ,  H01L29/66

CPC分类号： H01L29/78696 ,  H01L29/6675 ,  H01L29/66765 ,  H01L29/78618 ,  H01L29/78663 ,  H01L29/78669

摘要： A body layer formed of a semiconductor layer, the body layer comprising, a first region, a second region, and a channel region positioned therebetween; a channel stopper formed on the channel region; source and drain electrodes electrically connected to the first and second regions via first and second contact layers respectively are provided. Each of the first and second contact layers comprises an impurities-containing first amorphous silicon layer; a thickness of each of the first and second regions is less than a thickness of the channel region; and the first and second regions comprise a second amorphous silicon layer containing impurities in a concentration being less than a concentration of impurities contained in the first amorphous silicon layer. This makes it possible to suppress a photoexcited current and improve the aperture ratio in a case that a display apparatus is configured.

公开(公告)号：US20230280619A1

公开(公告)日：2023-09-07

申请号：US18196725

申请日：2023-05-12

申请人： Japan Display Inc.

发明人： Tomohide ONOGI ,  Yasuo SEGAWA

IPC分类号： G02F1/1343 ,  G02F1/1362 ,  G02F1/1333 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786

CPC分类号： G02F1/134336 ,  G02F1/136227 ,  G02F1/134363 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/1222 ,  H01L27/1244 ,  H01L29/78669 ,  H01L29/78678 ,  G02F1/133357 ,  G02F1/134372 ,  G02F1/136295 ,  G02F2201/40 ,  G02F2202/103 ,  G02F2202/104 ,  G02F2201/121 ,  G02F2201/123

摘要： A liquid crystal display device according to FFS technology is provided, which sufficiently provides a common electrode with common electric potential and improves an aperture ratio of pixels. A pixel electrode is formed of a first layer transparent electrode. A common electrode made of a second layer transparent electrode is formed above the pixel electrode interposing an insulation film between them. The common electrode in an upper layer is provided with a plurality of slits. The common electrode extends over all the pixels in a display region. An end of the common electrode is disposed on a periphery of the display region and connected with a peripheral common electric potential line that provides a common electric potential Vcom. There is provided neither an auxiliary common electrode line nor a pad electrode, both of which are provided in a liquid crystal display device according to a conventional art.

公开(公告)号：US20190139992A1

公开(公告)日：2019-05-09

申请号：US16241247

申请日：2019-01-07

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： JI HUN LIM ,  Joon Seok Park

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/417 ,  H01L29/423

CPC分类号： H01L27/124 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78621 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode; a semiconductor member including a channel region overlapping the gate electrode with the gate insulating layer interposed therebetween, and a source region and a drain region that face each other with the channel region interposed therebetween; an interlayer insulating layer on the semiconductor member; a data conductor on the interlayer insulating layer; and a passivation layer on the data conductor, wherein the interlayer insulating layer has a first hole on the channel region.

公开(公告)号：US20180356677A1

公开(公告)日：2018-12-13

申请号：US15868768

申请日：2018-01-11

申请人： Samsung Display Co., Ltd.

发明人： Jang-Il KIM ,  Yeo Geon YOON ,  Keun Woo PARK ,  Su Wan WOO ,  Kee-Bum PARK ,  Do Yeong PARK

IPC分类号： G02F1/1335 ,  G02F1/1368 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786

CPC分类号： G02F1/133514 ,  G02F1/133528 ,  G02F1/133617 ,  G02F1/13394 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2202/36 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78609 ,  H01L29/78669

摘要： An exemplary embodiment of the present inventive concept provides a display device including: a light unit configured to emit blue light; a color conversion panel disposed on the light unit; and a display panel disposed between the light unit and the color conversion panel to include a transistor. The color conversion panel includes: a substrate; a color conversion layer disposed between the substrate and the display panel to include a semiconductor nanocrystal; a transmission layer disposed between the substrate and the display panel; and a polarization layer disposed between the color conversion layer and the display panel and between the transmission layer and the display panel, and the display panel includes a blue light blocking film which overlaps the transistor, while the blue light blocking film includes a red color filter.

公开(公告)号：US20180337446A1

公开(公告)日：2018-11-22

申请号：US15542488

申请日：2016-10-06

申请人： Sharp Kabushiki Kaisha

发明人： Makoto NAKAZAWA ,  Takatoshi ORUI ,  Shigeyasu MORI ,  Fumiki NAKANO ,  Kiyoshi MINOURA

IPC分类号： H01Q1/38 ,  H01Q21/06 ,  H01Q21/00 ,  H01Q1/24 ,  H01L23/34 ,  H01L23/66 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01Q1/38 ,  G09G3/3614 ,  G09G3/3648 ,  H01L23/345 ,  H01L23/66 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1259 ,  H01L29/786 ,  H01L29/78669 ,  H01L29/7869 ,  H01L2223/6677 ,  H01Q1/241 ,  H01Q3/34 ,  H01Q3/44 ,  H01Q21/0012 ,  H01Q21/0087 ,  H01Q21/064

摘要： A TFT substrate (101) including a plurality of antenna element regions (U) arranged on a dielectric substrate (1), the TFT substrate including a transmitting/receiving region including a plurality of antenna element regions, and a non-transmitting/receiving region located outside of the transmitting/receiving region, each of the plurality of antenna element regions (U) including: a thin film transistor (10); a first insulating layer (11) covering the thin film transistor and having a first opening (CH1) which exposes a drain electrode (7D) of the thin film transistor (10); and a patch electrode (15) formed on the first insulating layer (11) and in the first opening (CH1), and electrically connected to the drain electrode (7D) of the thin film transistor, wherein the patch electrode (15) includes a metal layer, and a thickness of the metal layer is greater than a thickness of a source electrode (7S) and the drain electrode (7D) of the thin film transistor.

公开(公告)号：US20180329246A1

公开(公告)日：2018-11-15

申请号：US15848879

申请日：2017-12-20

申请人： HKC Corporation Limited ,  Chongqing HKC Optoelectronics Technology Co., ltd.

发明人： EN-TSUNG CHO ,  FENGYUN YANG

IPC分类号： G02F1/133 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/144 ,  H01L31/20

CPC分类号： G02F1/13318 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13312 ,  G02F2202/103 ,  H01L27/1443 ,  H01L29/78669 ,  H01L31/1055 ,  H01L31/202

摘要： The present invention discloses a display panel, the manufacturing method of the display panel, and a display device. The display panel comprises a first substrate with a display area and a non-display area, wherein the display area comprises a plurality of transistors, and a light sensor is adjacent to the plurality of transistors.