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1.
公开(公告)号:US20190245062A1
公开(公告)日:2019-08-08
申请号:US16387402
申请日:2019-04-17
发明人: Michinobu MIZUMURA
IPC分类号: H01L29/66 , H01L27/12 , H01L29/786 , H01L21/20 , H01L21/268
CPC分类号: H01L29/66757 , H01L21/20 , H01L21/2026 , H01L21/268 , H01L27/1229 , H01L27/1285 , H01L29/66765 , H01L29/78675 , H01L29/78696
摘要: The present invention provides a laser annealing method for irradiating laser light L to an amorphous silicon thin film deposited on a substrate to obtain polysilicon, the method including: multiply irradiating the laser light L while changing an irradiation area of the laser light L on the amorphous silicon thin film to achieve such a grain size distribution that a crystal grain size of the polysilicon decreases from a central portion to a side edge portion at least along a center line C of the irradiation area of the laser light L. The above laser annealing method can reduce a leak current through a simple process.
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2.
公开(公告)号:US20190140103A1
公开(公告)日:2019-05-09
申请号:US16239454
申请日:2019-01-03
CPC分类号: H01L29/78678 , H01L21/02675 , H01L21/20 , H01L21/67115 , H01L27/1281 , H01L29/04 , H01L29/66765 , H01L29/78618 , H01L29/78621
摘要: The present invention provides a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, which are laminated on a substrate. The semiconductor layer is a polysilicon thin film. The polysilicon thin film in regions corresponding to the source electrode and the drain electrode has a smaller crystal grain size than that of the polysilicon thin film in a channel region between the source electrode and the drain electrode.
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公开(公告)号:US20180350850A1
公开(公告)日:2018-12-06
申请号:US15739712
申请日:2017-07-21
发明人: Qiming GAN
IPC分类号: H01L27/12 , G02F1/1368 , G02F1/1362 , G02F1/1343
CPC分类号: H01L27/1288 , G02F1/13439 , G02F1/1362 , G02F1/136286 , G02F1/1368 , G02F2001/136231 , G02F2001/136295 , G02F2201/123 , H01L27/124 , H01L29/4908 , H01L29/66742 , H01L29/66765
摘要: The present disclosure relates to an array substrate and the manufacturing method thereof, and a liquid crystal panel. The method includes forming a first metal substrate on a substrate; adopting a first mask to etch the first metal substrate to form a gate; forming a gate insulation layer, an active layer, and a second metal layer on the first metal layer in sequence; and adopting a second mask to etch the second metal layer and the active layer to form a source, a drain, and a pixel electrode. In this way, only two masks are adopted in the manufacturing process. Thus, the manufacturing process is enhanced, and the cost of the product is reduced.
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公开(公告)号:US10038074B2
公开(公告)日:2018-07-31
申请号:US15105572
申请日:2016-04-26
发明人: Shipeng Chi
IPC分类号: H01L29/66 , H01L29/786 , H01L21/02
CPC分类号: H01L29/6675 , H01L21/02667 , H01L29/66765 , H01L29/786 , H01L29/78624 , H01L29/78645 , H01L29/78678
摘要: The present invention provides a manufacture method of a TFT substrate and a manufactured TFT substrate. By locating the first channel region and the first lightly doped offset region between the first source and the drain, and locating the second channel region and the second lightly doped offset region between the second source and the drain, and forming the first overlapping region and the second overlapping region respectively between the drain and the gate and between the second source and the gate, thus, the paths of the current flowing from the first, the second sources to the drain and the current flowing from the drain to the first, the second sources are the same. Namely, the current path from source to the drain and the current path from the drain to the source are the same. According, the symmetry of the TFT structure is realized.
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公开(公告)号:US20180212043A1
公开(公告)日:2018-07-26
申请号:US15327470
申请日:2016-12-29
发明人: Tao Sun
IPC分类号: H01L29/66 , H01L27/12 , H01L29/417 , H01L29/786
CPC分类号: H01L29/66765 , B81C2201/0108 , G02F1/133345 , G02F1/136227 , G03F1/80 , G03F5/16 , G03F7/0035 , G03F7/0041 , G03F7/422 , G03F7/427 , H01L21/0217 , H01L21/02274 , H01L21/02592 , H01L21/0262 , H01L21/0274 , H01L21/205 , H01L21/2855 , H01L21/30604 , H01L21/3065 , H01L21/3081 , H01L21/3085 , H01L21/3086 , H01L21/31058 , H01L21/31133 , H01L21/31138 , H01L21/31144 , H01L21/32 , H01L21/32134 , H01L21/32139 , H01L27/1214 , H01L27/127 , H01L27/1288 , H01L29/41733 , H01L29/42384 , H01L29/458 , H01L29/4908 , H01L29/518 , H01L29/78603 , H01L29/78609 , H01L29/78618 , H01L29/78669 , H01L2924/13069 , H05K2201/0338 , H05K2201/0361
摘要: Disclosed is a method for manufacturing a thin film transistor. The method includes steps of etching a second metal layer and a semiconductor layer to form a boundary region of a thin film transistor; etching the second metal layer again to form a source, a drain and a back channel region of the thin film transistor; removing residual photoresist via an ashing procedure; and etching the semiconductor layer again to form a conductive channel of the thin film transistor. According to the method, the electric leakage problem of thin film transistor due to diffusion of copper and contamination of organic stripping liquid can be eliminated.
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公开(公告)号:US20180204859A1
公开(公告)日:2018-07-19
申请号:US15325623
申请日:2016-07-22
发明人: Fuqiang LI
IPC分类号: H01L27/12 , H01L29/66 , H01L21/02 , H01L21/265 , H01L21/266
CPC分类号: H01L27/1288 , H01L21/02667 , H01L21/265 , H01L21/26513 , H01L21/266 , H01L27/1222 , H01L27/124 , H01L27/1274 , H01L29/66765 , H01L29/78621
摘要: A method for manufacturing an array substrate includes (S1) forming a pattern including a gate electrode and a gate line, (S2) forming an insulating layer, (S3) forming a pattern including an active layer, where the region where the active layer is arranged includes a first region corresponding to the gate electrode and second regions arranged on both sides of the first region, (S4) forming a mask pattern including a hollowed-out portion, a first portion and a second portion, wherein the second portion has a thickness smaller than the first portion, (S5) etching the insulating layer to form a via hole for exposing a portion of the gate line, and (S6) ashing a portion of the mask pattern corresponding to the second region to remove the portion of the mask pattern corresponding to the second region, and implanting ions into the active layer.
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7.
公开(公告)号:US20180197901A1
公开(公告)日:2018-07-12
申请号:US15533109
申请日:2016-12-12
发明人: Chaochao Sun , Chao Wang , Huafeng Liu , Shengwei Zhao , Bule Shun , Lei Yang , Chongliang Hu , Meng Yang , Jingping Lv , Lin Xie , Shimin Sun , Duolong Ding
IPC分类号: H01L27/12 , H01L29/66 , H01L21/265 , H01L21/266 , H01L21/027 , H01L29/786 , H01L29/167 , H01L21/02
CPC分类号: H01L27/1288 , H01L21/02532 , H01L21/02592 , H01L21/0262 , H01L21/02675 , H01L21/0274 , H01L21/26513 , H01L21/266 , H01L27/1214 , H01L27/1222 , H01L27/1274 , H01L27/3262 , H01L29/167 , H01L29/66757 , H01L29/66765 , H01L29/78621 , H01L29/78633 , H01L29/78645 , H01L29/78675 , H01L29/78678
摘要: The present application discloses a method of fabricating a thin film transistor, including forming a semiconductor layer having a pattern corresponding to that of the active layer on a base substrate; forming a first photoresist layer on a side of the semiconductor layer distal to the base substrate; the first photoresist layer being in an area corresponding to the channel region, the second doped region, and the fourth doped region; doping a region of the semiconductor layer corresponding to the first doped region and the third doped region using the first photoresist layer as a mask plate; forming a second photoresist layer by removing a portion of the first photoresist layer to expose an initial portion of the semiconductor layer corresponding to at least a portion of the second doped region and at least a portion of the fourth doped region; and doping the initial portion of the semiconductor layer using the second photoresist layer as a mask plate.
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公开(公告)号:US10020377B2
公开(公告)日:2018-07-10
申请号:US15345360
申请日:2016-11-07
CPC分类号: H01L29/66477 , G03F7/2022 , H01L27/1266 , H01L27/1288 , H01L29/66757 , H01L29/66765 , H01L29/66969 , H01L29/78696
摘要: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.
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9.
公开(公告)号:US20180190744A1
公开(公告)日:2018-07-05
申请号:US15855993
申请日:2017-12-27
申请人: LG Display Co., Ltd.
发明人: Kum-Mi OH , Shun-Young YANG , Min-Seong YUN
IPC分类号: H01L27/32 , H01L29/786 , H01L29/66
CPC分类号: H01L27/3262 , H01L27/1222 , H01L27/124 , H01L27/1255 , H01L27/1262 , H01L27/127 , H01L27/3211 , H01L27/3248 , H01L27/3265 , H01L27/3276 , H01L29/66765 , H01L29/78678 , H01L2227/323
摘要: Disclosed are a backplane substrate that is capable of expressing high gradation even through a small pixel, a method of manufacturing the same, and an organic light-emitting display device using the same. Integration for ultra-high resolution is possible through structural modification.
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公开(公告)号:US20180190680A1
公开(公告)日:2018-07-05
申请号:US15856685
申请日:2017-12-28
发明人: Toshikazu KONDO , Hideyuki KISHIDA
IPC分类号: H01L27/12 , H01L29/786 , H01L29/66 , H01L29/49 , H01L29/45 , H01L29/24 , H01L21/477 , H01L21/02
CPC分类号: H01L27/1225 , H01L21/02554 , H01L21/02565 , H01L21/02614 , H01L21/0262 , H01L21/02631 , H01L21/477 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/1259 , H01L27/3248 , H01L27/3262 , H01L29/24 , H01L29/45 , H01L29/458 , H01L29/4908 , H01L29/66765 , H01L29/66969 , H01L29/78603 , H01L29/78606 , H01L29/78618 , H01L29/78663 , H01L29/78678 , H01L29/7869 , H01L29/78693
摘要: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
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