Abstract:
A driving unit of display panel includes a data driving part, a timing controlling part and a gate driving part. The data driving part is configured to receive reference image data and includes a first data driving circuit part having a first channel outputting a first reference data signal based on the reference image data and a k-th channel outputting a k-th reference data signal based on the reference image data. The timing controlling part is configured to detect a time difference between the first reference data signal and the k-th reference data signal. The gate driving part is configured to output a gate signal to each of gate lines. By delaying data signals based on the gate signal delay caused by long line load and RC delay, the present invention may improve display quality of a display device.
Abstract:
A display device includes a display panel including gate lines, data lines, and pixels each connected to a corresponding gate line and a corresponding data line, a gate driver configured to drive the gate lines, a data driver configured to drive the data lines, and a timing controller configured to generate control signals to control the data driver and to apply a vertical synchronization start signal including a first pulse, a second pulse, a first gate pulse signal, and a second gate pulse signal to the gate driver. The gate driver applies gate driving signals to the gate lines to pre-charge the pixels in response to the first pulse of the vertical synchronization start signal and the first gate pulse signal, and to main-charge the pixels in response to the second pulse of the vertical synchronization start signal and the second gate pulse signal.
Abstract:
Disclosed is a display apparatus including: a display panel including pixels connected with a plurality of gate lines and a plurality of data lines; a gate driver supplying gate signals to the gate lines; and a data driver supplying data voltages to the data lines. The data driver includes a temperature measurer generating a temperature signal of the data driver.
Abstract:
Disclosed is a display apparatus including: a display panel including pixels connected with a plurality of gate lines and a plurality of data lines; a gate driver supplying gate signals to the gate lines; and a data driver supplying data voltages to the data lines. The data driver includes a temperature measurer generating a temperature signal of the data driver.
Abstract:
A display apparatus includes a display panel, a position detector, a driving controller, a gate driver and a data driver. The display panel is configured to display an image. The position detector is configured to determine a position of a user. The driving controller is configured to generate an overdriving value according to a grayscale value of previous frame data and a grayscale value of present frame data. The gate driver is configured to output gate signals to the display panel. The data driver is configured to output data voltages to the display panel based on the overdriving value.
Abstract:
A display panel driving apparatus includes a gate driving circuit, a data driving circuit, a timing controlling circuit and a voltage generating circuit state receiving circuit. The voltage generating circuit state receiving circuit is configured to receive voltage generating circuit state data indicating a temperature, a voltage or a current of a voltage generating circuit from the voltage generating circuit. The voltage generator generates a voltage used to drive the display panel, and controls an operation of the timing controlling circuit according to the voltage generating circuit state data.
Abstract:
An apparatus for monitoring pixel data includes a multiplexer configured to select pixel data applied to at least one of function blocks which is configured to convert the pixel data provided from an external device and adjust characteristics of a display device, a monitoring module configured to store the pixel data selected by the multiplexer, and an analyzing module configured to output a location selection signal to the multiplexer which provides the monitoring module with the pixel data based on the location selection signal, to read out the pixel data stored in the monitoring module by applying a pixel position signal to the monitoring module, and to analyze a variation of the read out pixel data.
Abstract:
A timing controller for a display apparatus includes a dithering unit outputting a first signal in which bit widths of image signals are reduced, an image pattern detector detecting an image pattern of the image signals and outputting a dithering off signal corresponding to the detected image pattern, a dithering selector receiving the first signal and converts the first signal to a second signal in response to the dithering off signal, and a response time compensator generating a present image signal from the second signal and compensates a liquid crystal response time in accordance with a difference between the present image signal and a first previous image signal to output a data signal.
Abstract:
In a method of operating a display device supporting a variable frame mode, frame data are received during a constant active period of a frame period including the active period and a variable blank period, the received frame data are written to a frame memory in the active period, the received frame data are outputted to a data driver in the active period to display an image based on the received frame data, a time of the variable blank period is counted, and, when the time of the variable blank period reaches a predetermined threshold blank time, the frame data stored in the frame memory are outputted to the data driver in the variable blank period to display an image based on the frame data stored in the frame memory.
Abstract:
A display apparatus includes a first interpolator configured to generate first correction data for a first polarity corresponding to an input data using a first look up table which stores correction data for the first polarity compensating for a luminance difference between the first polarity and a second polarity opposite to the first polarity of a data voltage for the sub pixel, a first delay compensator configured to apply a correction value to the first correction data for the first polarity and generate second correction data for the first polarity, the correction value compensating for an RC delay based on a pixel position corresponding to the input data.