Abstract:
A display apparatus includes a display panel, a printed circuit board, a first film electrically connected to the display panel and the printed circuit board, and a second film electrically connected to the display panel and the printed circuit board. The display panel includes panel pads of a first row electrically connected to the first film, panel pads of a second row electrically connected to the second film, and panel connecting lines electrically connecting the panel pads of the first row to the panel pads of the second row.
Abstract:
A display device includes a display panel including an edge extending along a first direction, a main circuit board adjacent to the edge of the display panel, and a connection circuit board which connects the main circuit board to the display panel at the edge thereof. The connection circuit board includes a plurality of board side pads which are arranged along the first direction and at which the connection circuit board is connected to the main circuit board. Each of the plurality of board side pads includes a first pad, and a second pad adjacent to the first pad along the first direction. The second pad includes a plurality of signal pads which are arranged along a second direction which crosses the first direction and are each aligned with the first pad along the first direction.
Abstract:
A display device includes a display panel including a pixel part to display an image, and a pad part connected to the pixel part; a first flexible circuit film coupled to the pad part and including a first alignment mark; and a second flexible circuit film coupled to the pad part, overlapping the first flexible circuit film, and including a second alignment mark aligned with the first alignment mark. The first and second alignment marks are located in an area where the first flexible circuit film overlaps the second flexible circuit film.
Abstract:
A display apparatus includes a display panel, a gate driving part, and a data driving part. The display panel is configured to display an image, and includes a gate line and data lines. The gate driving part is configured to output a gate signal to the gate line. The data driving part includes a plurality of data driving integrated circuit parts. Each of the plurality of data driving integrated circuit parts includes channels, configured to output data signals to the data lines, and a dummy data channel. A sensing pin, configured to receive the gate signal, is formed in each dummy data channel.
Abstract:
A display device including: a display panel displaying an image based on first and second frames; a timing controller outputting a plurality of image signals for each of the first and second frames and outputting a test signal during a reset section; and a source driving chip outputting a plurality of data voltages corresponding to the image signals or a test voltage corresponding to the test signal. The reset section is arranged after the first frame and before the second frame, and the source driving chip blocks the data voltage in the second frame from being output to driving lines having an arrival time period equal to or less than a reference time period during the reset section, the arrival time period representing the amount of time taken to arrive at the test voltage from an initial voltage.
Abstract:
A display driving circuit includes a digital-to-analog converter configured to convert a digital image signal to an analog image signal, and a buffer circuit configured to receive the analog image signal and to output an output signal to be applied to a data line, where the buffer circuit includes an input stage configured to receive the analog image signal and to output a first signal, a first output stage configured to receive a first voltage and a second voltage and to output the output signal, a second output stage configured to receive a third voltage and a fourth voltage and to output the output signal, and a selection circuit configured to apply the first signal from the input stage to the first output stage or the second output stage in response to a mode signal.
Abstract:
A display device includes: a display panel in which pixels are arranged; a first circuit board configured to provide a first driving signal to the display panel; and a second circuit board connecting the display panel and the first circuit board and having a first region in which a driving chip providing a second driving signal to the display panel is arranged and a second region surrounding the first region, the first region and the second region being defined in the second circuit board, wherein: the second circuit board comprises a first line electrically connected to the driving chip and a second line electrically insulated from the driving chip; the second line comprises a common line in the first region; and the width of the common line decreases as the common line becomes farther away from the first circuit board on a plane.
Abstract:
A display apparatus includes a display panel, a first driver and a second driver. The display panel includes a plurality of gate lines and a plurality of data lines. The display panel is configured to display an image based on input image data. The first driver is configured to output compensating gate signals having the same timing to the gate lines during a first period and scan gate signals having different timings to the gate lines during a second period. The second driver is configured to apply a compensating data voltage corresponding to a compensating grayscale value to the data lines during the first period and a target data voltage corresponding to a target grayscale value to the data lines during the second period.
Abstract:
A driving circuit includes a receiver configured to receive an image control signal comprising a data signal and a clock signal, separate the data signal from the clock signal and output the separated data and clock signals, a clock recovery unit generating a reference clock signal based on the clock signal and generating a plurality of multi-phase clock signals having different phases from that of the reference clock signal, an output clock generation unit outputting an output clock signal in synchronization with the clock signal and the plurality of multi-phase clock signals, and a data output unit driving a plurality of data lines with a data driving signal corresponding to the data signal in synchronization with the output clock signal, and the output clock generation unit outputs the plurality of multi-phase clock signals.
Abstract:
A display device includes a display panel, a gate driver, a data driver, and a driving control unit. The display panel includes pixels connected to a corresponding one of gate lines and a corresponding one of data lines. The gate driver drives the gate lines. The data driver includes first pads and second pads. The first pads are connected to each of first data lines of the data lines, and the second pads are connected to each of second data lines of the data lines. The driving control unit provides control signals and a data signal to the data driver, and to control the gate driver. The data driver includes a digital-to-analog converter and a switching circuit. The digital-to-analog converter converts the data signal into analog signals. The switching circuit sequentially outputs the analog signals to the first pads during a test mode.