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公开(公告)号:US20210104558A1
公开(公告)日:2021-04-08
申请号:US16875770
申请日:2020-05-15
Applicant: Samsung Display Co., Ltd.
Inventor: June Hwan KIM , Tae Young KIM , Jong Woo PARK , Young Tae CHOI , Hyun Cheol HWANG , Ki Ju IM
IPC: H01L27/12 , H01L29/786 , H01L27/32
Abstract: A display device is provided. The display device comprises a substrate, a first buffer layer on the substrate, a first semiconductor layer on the first buffer layer and including a first active layer, a first gate insulating layer on the first semiconductor layer and the first buffer layer and covering the first active layer, a first conductive layer on the first gate insulating layer and including a first gate electrode, a second conductive layer on the first conductive layer and including a first source/drain electrode, a first interlayer insulating layer on the first conductive layer, a second semiconductor layer on the first interlayer insulating layer and including a second active layer, a second gate insulating layer on the second semiconductor layer and covering the second active layer, and a third conductive layer on the second gate insulating layer and including a second gate electrode and a second source/drain electrode, wherein the first gate insulating layer and the second gate insulating layer include different insulating materials.
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公开(公告)号:US20240063229A1
公开(公告)日:2024-02-22
申请号:US18501953
申请日:2023-11-03
Applicant: Samsung Display Co., LTD.
Inventor: June Hwan KIM , Tae Young KIM , Jong Woo PARK , Young Tae CHOI , Hyun Cheol HWANG , Ki Ju IM
IPC: H01L27/12 , H01L29/786 , H10K59/121
CPC classification number: H01L27/1237 , H01L27/1218 , H01L27/1255 , H01L29/78675 , H01L29/7869 , H10K59/1213 , H10K59/1216
Abstract: A display device is provided. The display device comprises a substrate, a first buffer layer on the substrate, a first semiconductor layer on the first buffer layer and including a first active layer, a first gate insulating layer on the first semiconductor layer and the first buffer layer and covering the first active layer, a first conductive layer on the first gate insulating layer and including a first gate electrode, a second conductive layer on the first conductive layer and including a first source/drain electrode, a first interlayer insulating layer on the first conductive layer, a second semiconductor layer on the first interlayer insulating layer and including a second active layer, a second gate insulating layer on the second semiconductor layer and covering the second active layer, and a third conductive layer on the second gate insulating layer and including a second gate electrode and a second source/drain electrode, wherein the first gate insulating layer and the second gate insulating layer include different insulating materials.
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公开(公告)号:US20210249491A1
公开(公告)日:2021-08-12
申请号:US16952787
申请日:2020-11-19
Applicant: Samsung Display Co., LTD.
Inventor: June Hwan KIM , Tae Young KIM , Jong Woo PARK , Ki Ju IM , Ji Ho MOON , Hyun Cheol HWANG
IPC: H01L27/32 , G09G3/3233 , H01L51/56
Abstract: A display device includes an organic light emitting diode, a first transistor driving the organic light emitting diode, a second transistor transmitting a data signal to the first transistor, a third transistor transmitting a first power voltage to the first transistor, wherein a semiconductor pattern of the first transistor is disposed over a semiconductor pattern of the second transistor, a semiconductor pattern of the third transistor is disposed over the semiconductor pattern of the first transistor, a lower transistor insulating film is disposed between the semiconductor pattern of the first transistor and the semiconductor pattern of the second transistor, and an upper transistor insulating film is disposed between the semiconductor pattern of the first transistor and the semiconductor pattern of the third transistor.
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公开(公告)号:US20200243006A1
公开(公告)日:2020-07-30
申请号:US16567578
申请日:2019-09-11
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Hyo Jung KIM , Tae Young KIM , Yong Sung Park , Jong Woo Park , Mi Seon SEO , Keun Soo LEE , Ki Ju IM , Dae Youn CHO , Young Tae CHOI , Hyun Cheol HWANG
IPC: G09G3/3233 , H01L27/32
Abstract: A display device includes a plurality of pixels. Each pixel includes a first transistor that controls an amount of current received from a first power supply voltage line connected via a second node to an organic light emitting diode in response to a voltage of a first node, a second transistor connected between a data line and the second node and that includes a first gate electrode connected to a first scan line, a light emitting line connected to a gate electrode of at least one light emitting transistor located in a current path between the first power supply voltage line and the organic light emitting diode, and a seventh transistor connected between one of at least one second gate electrode of the second transistor and the light emitting line. Accordingly, a threshold voltage of a switching transistor included in each of the plurality of pixels may be negatively shifted.
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公开(公告)号:US20230189567A1
公开(公告)日:2023-06-15
申请号:US18085076
申请日:2022-12-20
Applicant: Samsung Display Co., LTD.
Inventor: June Hwan KIM , Tae Young KIM , Jong Woo PARK , Ki Ju IM , Ji Ho MOON , Hyun Cheol HWANG
IPC: H10K59/121 , G09G3/3233 , H10K59/131 , H10K71/00
CPC classification number: H10K59/1213 , G09G3/3233 , H10K59/131 , H10K59/1216 , H10K71/00 , G09G2300/0809 , H01L29/66757
Abstract: A display device includes an organic light emitting diode, a first transistor driving the organic light emitting diode, a second transistor transmitting a data signal to the first transistor, a third transistor transmitting a first power voltage to the first transistor, wherein a semiconductor pattern of the first transistor is disposed over a semiconductor pattern of the second transistor, a semiconductor pattern of the third transistor is disposed over the semiconductor pattern of the first transistor, a lower transistor insulating film is disposed between the semiconductor pattern of the first transistor and the semiconductor pattern of the second transistor, and an upper transistor insulating film is disposed between the semiconductor pattern of the first transistor and the semiconductor pattern of the third transistor.
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