公开(公告)号：US20200027943A1

公开(公告)日：2020-01-23

申请号：US16364732

申请日：2019-03-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KIWOOK KIM ,  KWANGMIN KIM ,  JISU NA ,  MINWOO BYUN

IPC: H01L27/32 ,  H01L51/00 ,  H01L51/52

Abstract: A display device includes a substrate including a trench portion. The substrate includes a display area and a peripheral area adjacent to the display area. The display area includes a first display area and a second display area arranged with the trench portion therebetween to display an image. A thin-film transistor and a display element are each arranged in the display area. A built-in circuit portion is over the peripheral area and is adjacent to the trench portion. A first wiring is in the first display area and a second wiring is in the second display area. A connecting wiring connects the first wiring to the second wiring and overlaps the built-in circuit portion.

公开(公告)号：US20250098462A1

公开(公告)日：2025-03-20

申请号：US18967944

申请日：2024-12-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KIWOOK KIM ,  KWANGMIN KIM ,  YANGWAN KIM ,  JISU NA ,  MINWOO BYUN

IPC: H10K59/131 ,  H10K50/844 ,  H10K59/124

Abstract: A display apparatus includes a substrate, a wire having an inner edge including first and second portions, a first insulating layer covering a portion of the substrate, and a second insulating layer. The portion of the substrate covered by the first insulating layer is closer to a center of the substrate than the wire, the first insulating layer covers a part of the first portion of the wire and a part of the second portion of the wire, and a first end of the first insulating layer is disposed on the wire. The second insulating layer covers the first insulating layer and has a second end disposed on the wire. A distance between the first end and the second end covering the first portion of the wire is different from a distance between the first end and the second end covering the second portion of the wire.

公开(公告)号：US20240090289A1

公开(公告)日：2024-03-14

申请号：US18519742

申请日：2023-11-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KIWOOK KIM ,  KWANGMIN KIM ,  YANGWAN KIM ,  JISU NA ,  MINWOO BYUN

IPC: H10K59/131 ,  H10K50/844 ,  H10K59/124

CPC classification number: H10K59/131 ,  H10K50/844 ,  H10K59/124

Abstract: A display apparatus includes a substrate, a wire having an inner edge including first and second portions, a first insulating layer covering a portion of the substrate, and a second insulating layer. The portion of the substrate covered by the first insulating layer is closer to a center of the substrate than the wire, the first insulating layer covers a part of the first portion of the wire and a part of the second portion of the wire, and a first end of the first insulating layer is disposed on the wire. The second insulating layer covers the first insulating layer and has a second end disposed on the wire. A distance between the first end and the second end covering the first portion of the wire is different from a distance between the first end and the second end covering the second portion of the wire.

公开(公告)号：US20230309354A1

公开(公告)日：2023-09-28

申请号：US18326291

申请日：2023-05-31

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KIWOOK KIM ,  KWANGMIN KIM ,  JISU NA ,  MINWOO BYUN

IPC: H10K59/131 ,  H10K50/844 ,  H10K77/10

CPC classification number: H10K59/131 ,  H10K50/844 ,  H10K59/1315 ,  H10K77/10 ,  H10K50/8426

Abstract: A display device includes a substrate including a trench portion. The substrate includes a display area and a peripheral area adjacent to the display area. The display area includes a first display area and a second display area arranged with the trench portion therebetween to display an image. A thin-film transistor and a display element are each arranged in the display area. A built-in circuit portion is over the peripheral area and is adjacent to the trench portion. A first wiring is in the first display area and a second wiring is in the second display area. A connecting wiring connects the first wiring to the second wiring and overlaps the built-in circuit portion.

公开(公告)号：US20160372533A1

公开(公告)日：2016-12-22

申请号：US15099189

申请日：2016-04-14

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： TAEHOON KIM ,  JISU NA ,  SEUNGKYU LEE

IPC: H01L27/32

CPC classification number: H01L27/3272 ,  H01L27/3265 ,  H01L27/3276

Abstract: A display apparatus includes a data line extending in a first direction, a main scan line disposed substantially parallel to the data line, a sub scan line extending in a second direction that crosses the main scan line, wherein the sub scan line is electrically connected with the main scan line, a driving voltage line extending in the first direction and disposed between the data line and the main scan line, and a shield layer disposed on a layer that is different from a layer on which the driving voltage line is disposed, the shield layer being electrically connected with the driving voltage line, wherein the shield layer overlaps at least one of the data line and the main scan line.

Abstract translation: 显示装置包括沿第一方向延伸的数据线，与数据线大致平行设置的主扫描线，沿与主扫描线相交的第二方向延伸的副扫描线，其中副扫描线与 主扫描线，在第一方向上延伸并且设置在数据线和主扫描线之间的驱动电压线，以及设置在与设置有驱动电压线的层不同的层上的屏蔽层， 屏蔽层与驱动电压线电连接，其中屏蔽层与数据线和主扫描线中的至少一个重叠。

公开(公告)号：US20240423033A1

公开(公告)日：2024-12-19

申请号：US18743665

申请日：2024-06-14

Applicant: Samsung Display Co., Ltd.

Inventor： Seunghoon SHIN ,  JOONG-SOO MOON ,  JINWOO PARK ,  JISU NA ,  HYUNGJUN PARK ,  CHANGSOO PYON ,  JAE YONG LEE

IPC: H10K59/126 ,  H10K59/121 ,  H10K59/124

Abstract: An electronic device includes a base layer, at least one transistor including a semiconductor pattern on the base layer and a gate electrode on the semiconductor pattern, a connection electrode on the at least one transistor, at least one insulating layer located between the semiconductor pattern and the connection electrode, a side light shielding pattern located at a same layer as that of the connection electrode, and a light emitting element on the connection electrode and electrically connected to the at least one transistor. The connection electrode passes through the at least one insulating layer to be connected to the semiconductor pattern, and the side light shielding pattern passes through the at least one insulating layer.

公开(公告)号：US20240265837A1

公开(公告)日：2024-08-08

申请号：US18423730

申请日：2024-01-26

Applicant: Samsung Display Co., LTD.

Inventor： JISU NA

IPC: G09G3/00 ,  G09G3/3233 ,  H10K59/131 ,  H10K59/80

CPC classification number: G09G3/006 ,  G09G3/3233 ,  H10K59/131 ,  H10K59/873 ,  G09G2300/0408 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2330/021 ,  G09G2330/12

Abstract: A display device includes: a substrate including a display area where pixels are arranged and a non-display area positioned around the display area; first crack detection lines disposed in the non-display area; a first dam positioned between the first crack detection lines and the display area; a second dam between the first dam and the first crack detection lines and including sub-layers; a common voltage line disposed in the non-display area, and which provides a common voltage to the pixels, and includes a concave part defined at an edge of the common voltage line facing the first crack detection lines; a second crack detection line electrically connected to the first crack detection lines, positioned between the first crack detection lines and the display area, and including a first line part and a first connection part contacting the first line part through a first contact hole overlapping one of the sub-layers.

公开(公告)号：US20170316732A1

公开(公告)日：2017-11-02

申请号：US15498605

申请日：2017-04-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JISU NA

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/08

Abstract: A scan driver includes a plurality of stages, each outputting a scan signal in response to a scan start pulse and clock signals. Each stage includes a first input circuit applying a high gate voltage to a first node in response to the scan start pulse or the scan signal from a previous stage, a second input circuit applying a first clock signal to a second node based on the first node's voltage, a first output circuit outputting a second clock signal as the scan signal in response to the first node's voltage, a second output circuit outputting a low gate voltage as the scan signal in response to the second node's voltage, and a leakage circuit coupled to the high gate voltage and providing a current from the high gate voltage to the second node in response to the voltage of the second node having a high level.