公开(公告)号：US12148348B2

公开(公告)日：2024-11-19

申请号：US18236426

申请日：2023-08-22

Applicant: Samsung Display Co., Ltd.

Inventor： Won Tae Kim ,  Bo Yeon Kim ,  Jae Han Lee

IPC: G09G3/20 ,  G09G3/3208

Abstract: A data driving circuit is disclosed that includes an amplifier and an offset control circuit. The amplifier has an offset voltage and is configured to output a data voltage reflecting the offset voltage. The offset control circuit is configured to control, in response to an input control signal, the amplifier to output the data voltage reflecting the offset voltage in a positive direction or a negative direction. The data driving circuit may enhance the display quality of a low grayscale image.

公开(公告)号：US11514864B2

公开(公告)日：2022-11-29

申请号：US17185155

申请日：2021-02-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Won Tae Kim ,  Myeong Su Kim ,  Bo Yeon Kim ,  Jae Han Lee ,  Whee Won Lee

IPC: G09G3/3225 ,  G09G3/3275 ,  H04N5/374 ,  G09G3/3233 ,  G09G3/3258 ,  G09G3/36 ,  G09G5/00

Abstract: A display device includes a display panel including a plurality of pixels connected to data lines and sensing lines, a data driver including a plurality of buffer amplifiers which supplies a first sensing voltage to the data lines during a first sensing period and a sensor which receives a first sensing signal from the pixels through the sensing lines during the first sensing period, and a global amplifier which supplies a second sensing voltage to the data lines during a second sensing period different from the first sensing period. The sensor receives a second sensing signal corresponding to the second sensing voltage from the pixels through the sensing lines during the second sensing period, and generates compensation data based on a difference value between the first sensing signal and the second sensing signal.

公开(公告)号：US11386853B2

公开(公告)日：2022-07-12

申请号：US17215670

申请日：2021-03-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Whee Won Lee ,  Myeong Su Kim ,  Bo Yeon Kim ,  Won Tae Kim ,  Jae Han Lee

IPC: G09G3/3291 ,  G09G3/3266

Abstract: A display device includes: a display panel including a plurality of pixels; a source driver for outputting a target initialization voltage in an analog format to the pixels through sensing lines; and a timing controller for providing the source driver with a data control signal including packet information associated with the target initialization voltage. The packet information is in a digital format. The source driver includes a digital-analog converter which generates the target initialization voltage in the analog format, based on the packet information.

公开(公告)号：US10762816B2

公开(公告)日：2020-09-01

申请号：US16045918

申请日：2018-07-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jae Han Lee ,  Myeong Su Kim ,  Sun Koo Kang ,  Bo Yeon Kim ,  Dong Won Park ,  Tae Gon Im ,  Jung Hwan Cho

IPC: G09G3/20 ,  G09G5/00

Abstract: A display device may include a timing controller, a data driver and a plurality of pixels. The timing controller supplies a clock training pattern over a data/clock signal line in a first time period, and supplies pixel/control data over the data/clock signal line in a second time period. The data driver generates a clock signal, using the clock training pattern, in the first period, and generate a plurality of data voltages based on the plurality of pixel data, using the clock signal, in the second period. The plurality of pixels receive the plurality of data voltages and emit corresponding light. During the second period, the data driver outputs a feedback signal to the timing controller indicating that the locking of the clock signal has failed. The timing controller re-supplies the clock training pattern in response to the feedback signal.