Abstract:
A data driving circuit is disclosed that includes an amplifier and an offset control circuit. The amplifier has an offset voltage and is configured to output a data voltage reflecting the offset voltage. The offset control circuit is configured to control, in response to an input control signal, the amplifier to output the data voltage reflecting the offset voltage in a positive direction or a negative direction. The data driving circuit may enhance the display quality of a low grayscale image.
Abstract:
A display device includes a display panel, a power supply, a signal controller configured to generate first and second clock signals having a period, a clock signal generator configured to generate a gate clock signal that is raised to a high level voltage in synchronization with the first clock signal, and that falls to a low level voltage in synchronization with the second clock signal, generate a panel separation signal by comparing a voltage of the gate clock signal with a first reference voltage during a falling period during which the gate clock signal falls, and transfer the panel separation signal to the power supply or the signal controller, and a gate driver configured to sequentially apply a gate signal by using the gate clock signal, wherein the power supply or the signal controller is configured to stop outputting depending on the panel separation signal.
Abstract:
An organic light-emitting display devices includes a display panel having first and second pixel groups, each group including first, second, and third pixels which emit light of different colors and a current measurement unit having a plurality of current measurement channels connected to the first and second pixel groups by data lines, wherein each of the current measurement channels includes a first measurement circuit connected to one of the first, second, and third pixels in the first pixel group and measures current characteristics of the connected one of the pixels and a second measurement circuit which measures current characteristics of one of the first, second, and third pixels, in the second pixel group, which emits light of the same color as that of light emitted from the one of the pixels connected to the first measurement circuit.
Abstract:
A gate driver includes a first shift register connected to gate lines, and configured to supply a gate signal to the gate lines in response to a first start pulse, and a second shift register connected to the gate lines and sensing control lines, and configured to supply the gate signal and a sensing signal to the gate lines and the sensing control lines in response to a second start pulse, in which the second shift register is configured to supply the second start pulse at different times in sequential frames.
Abstract:
A display device includes a display panel including a plurality of pixels connected to data lines and sensing lines, a data driver including a plurality of buffer amplifiers which supplies a first sensing voltage to the data lines during a first sensing period and a sensor which receives a first sensing signal from the pixels through the sensing lines during the first sensing period, and a global amplifier which supplies a second sensing voltage to the data lines during a second sensing period different from the first sensing period. The sensor receives a second sensing signal corresponding to the second sensing voltage from the pixels through the sensing lines during the second sensing period, and generates compensation data based on a difference value between the first sensing signal and the second sensing signal.
Abstract:
A display device includes: a display panel including a plurality of pixels; a source driver for outputting a target initialization voltage in an analog format to the pixels through sensing lines; and a timing controller for providing the source driver with a data control signal including packet information associated with the target initialization voltage. The packet information is in a digital format. The source driver includes a digital-analog converter which generates the target initialization voltage in the analog format, based on the packet information.
Abstract:
A display device may include a timing controller, a data driver and a plurality of pixels. The timing controller supplies a clock training pattern over a data/clock signal line in a first time period, and supplies pixel/control data over the data/clock signal line in a second time period. The data driver generates a clock signal, using the clock training pattern, in the first period, and generate a plurality of data voltages based on the plurality of pixel data, using the clock signal, in the second period. The plurality of pixels receive the plurality of data voltages and emit corresponding light. During the second period, the data driver outputs a feedback signal to the timing controller indicating that the locking of the clock signal has failed. The timing controller re-supplies the clock training pattern in response to the feedback signal.
Abstract:
A display device includes a display unit including a plurality of pixels, a scan driver applying a scan signal to a plurality of scan lines, a data driver applying a data signal to a plurality of data lines, and a power supply unit supplying a driving voltage to at least one among the display unit, the scan driver, and the data driver. The power supply unit includes an inductor connected between an input terminal to which an input voltage is input and a driving voltage output terminal to which the driving voltage is output, a switch connected between the inductor and a ground, and a switch controller outputting a first ramp pulse having a first frequency at a first load of the display device and outputting a second ramp pulse having a second frequency at a second load of the display device.
Abstract:
A display device includes a display unit including a plurality of pixels, a scan driver applying a scan signal to a plurality of scan lines, a data driver applying a data signal to a plurality of data lines, and a power supply unit supplying a driving voltage to at least one among the display unit, the scan driver, and the data driver. The power supply unit includes an inductor connected between an input terminal to which an input voltage is input and a driving voltage output terminal to which the driving voltage is output, a switch connected between the inductor and a ground, and a switch controller outputting a first ramp pulse having a first frequency at a first load of the display device and outputting a second ramp pulse having a second frequency at a second load of the display device.
Abstract:
A display device is disclosed. In one aspect, the display device includes a plurality of pixels, a plurality of data lines respectively connected to the pixels, and a compensation unit connected to at least one the data lines. The compensation unit includes a first capacitor storing a leakage current of a pixel connected to the data line, a second capacitor storing a difference current, where the difference current is the difference between a reference current and a pixel current measured when a data signal of a reference gray signal is applied to the pixel. The compensation unit also includes a comparator outputting a difference value between the voltages stored in the first and second capacitors. According to embodiments, is possible to measure an accurate pixel current regardless of a leakage current and accurately detect deterioration of a pixel.