公开(公告)号：US20240122006A1

公开(公告)日：2024-04-11

申请号：US18238550

申请日：2023-08-28

Applicant: Samsung Display Co., LTD.

Inventor： Shin Hyuk YANG ,  Dong Han KANG ,  Jee Hoon KIM ,  Sung Gwon MOON ,  Seung Sok SON ,  Woo Geun LEE

IPC: H10K59/131 ,  H10K59/12 ,  H10K59/122

CPC classification number: H10K59/131 ,  H10K59/1201 ,  H10K59/122

Abstract: A display device includes a data conductive layer including a first power line, a passivation layer with a first opening exposing the first power line, a via layer with a second opening partially overlapping the first opening, a pixel electrode on the via layer, a connection electrode in the first and second openings, a pixel-defining film with an opening overlapping the second opening, a light-emitting layer on the pixel-defining film, the pixel electrode and the connection electrode, and a common electrode connected to the first power line. The data conductive layer includes a data base layer, a data main metal layer, and a data capping layer, the first power line includes a wire connection structure, in which the data main metal layer is recessed from sides of the data capping layer, and the common electrode is connected to the data main metal layer in the wire connection structure.

公开(公告)号：US20250024710A1

公开(公告)日：2025-01-16

申请号：US18616218

申请日：2024-03-26

Applicant: Samsung Display Co., Ltd.

Inventor： Dong Han KANG ,  Shin Hyuk YANG ,  Woo Geun LEE ,  Jee Hoon KIM ,  Sung Gwon MOON

IPC: H10K59/121 ,  H10K59/12 ,  H10K59/131 ,  H10K59/80 ,  H10K71/60

Abstract: A display device is disclosed that includes a substrate, a first metal layer disposed on the substrate, an active layer disposed on the first metal layer, a second metal layer disposed on the active layer, a third metal layer disposed on the second metal layer, a fourth metal layer disposed on the third metal layer, and a transistor and a capacitor disposed on the substrate. The transistor includes a gate electrode disposed in at least any one of the first metal layer and the second metal layer, and a drain electrode, a source electrode and an active region disposed in the active layer, The capacitor includes a first capacitor including a first electrode disposed in the first metal layer and a second electrode disposed in the second metal layer, a second capacitor including the second electrode and a third electrode disposed in the third metal layer, and a third capacitor including the third electrode and a fourth electrode disposed in the fourth metal layer.

公开(公告)号：US20240120342A1

公开(公告)日：2024-04-11

申请号：US18208263

申请日：2023-06-10

Applicant: Samsung Display Co., LTD.

Inventor： Sung Gwon MOON ,  Dong Han KANG ,  Jee Hoon KIM ,  Seung Sok SON ,  Shin Hyuk YANG ,  Woo Geun LEE

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1244 ,  H01L27/1255 ,  H01L27/127

Abstract: A transistor array substrate includes a substrate, an active layer disposed on the substrate and including a channel region, a source region and a drain region, a gate insulating layer disposed on a part of the active layer, a gate electrode overlapping the channel region of the active layer and included in an electrode conductive layer which is disposed on the gate insulating layer, a source electrode included in the electrode conductive layer and in contact with a part of the source region of the active layer, and a drain electrode included in the electrode conductive layer and in contact with a part of the drain region of the active layer. The active layer includes an oxide semiconductor including crystals and is disposed as an island shape excluding a hole in a plan view.