Display device capable of clock synchronization recovery

    公开(公告)号:US09691316B2

    公开(公告)日:2017-06-27

    申请号:US14791065

    申请日:2015-07-02

    CPC classification number: G09G3/20 G09G2310/027 G09G2310/08 G09G2370/08

    Abstract: Provided is a display device including a timing controller configured to output a clock synchronizing signal for a clock data recovery operation, and a plurality of source driving chips configured to perform the clock data recovery operation in response to the clock synchronizing signal, wherein each of the source driving chips includes a filter unit configured to determine whether the first and second detection signals are activated or deactivated in response to a voltage level of the clock synchronizing signal and to output an operation signal according to a comparative result of the first and second detection signals, and an internal clock generator configured to perform the clock data recovery operation in response to the activation state of the operation signal.

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