公开(公告)号：US10467133B2

公开(公告)日：2019-11-05

申请号：US15064185

申请日：2016-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Amitai Perlstein ,  Eun Chu Oh ,  Amir Bennatan ,  Junjin Kong ,  Hong Rak Son

IPC: G06F12/02

Abstract: A storage device is provided as follows. A nonvolatile memory device includes blocks, each block having sub-blocks erased independently. A memory controller performs a garbage collection operation on the nonvolatile memory device by selecting a garbage collection victim sub-block among the sub-blocks and erasing the selected garbage collection victim sub-block to generate a free sub-block. The memory controller selects the garbage collection victim sub-block using valid page information of each sub-block and valid page information of memory cells adjacent to each sub-block.

公开(公告)号：US09965398B2

公开(公告)日：2018-05-08

申请号：US14993110

申请日：2016-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Amir Bennatan ,  Michael Erlihson ,  Jun Jin Kong

IPC: G06F12/02 ,  G06F12/1009 ,  G06F3/06

CPC classification number: G06F12/1009 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0679 ,  G06F12/0246 ,  G06F12/0253 ,  G06F2212/1024 ,  G06F2212/2022 ,  G06F2212/7201 ,  G06F2212/7205

Abstract: A memory device includes a nonvolatile memory and a memory controller. The memory controller receives first data from a host file system; stores the first data in a first physical block of the nonvolatile memory identified by a first physical page number (PPN); associates the first PPN with a first virtual page number (VPN); and communicates the first VPN to the host file system in response to receiving the first data.

公开(公告)号：US09477408B1

公开(公告)日：2016-10-25

申请号：US14686391

申请日：2015-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Amitai Perlstein ,  Amir Bennatan ,  Hanan Lechtman ,  Jun Jin Kong ,  Michael Erlihson

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0611 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688

Abstract: A memory device controller includes a main processor and a sequencer. The sequencer is configured to: estimate a time interval required to complete execution of a set of atom commands allocated to a channel of a non-volatile memory; calculate, for each of the plurality of atom commands, an urgency value associated with completing execution of a corresponding memory command after expiration of the time interval required to complete execution of the set of atom commands allocated to the channel; schedule each of the plurality of atom commands in the set of atom commands for execution by the non-volatile memory based on the calculated urgency values; and output the plurality of atom commands to the non-volatile memory for execution in the scheduled order.

Abstract translation: 存储器件控制器包括主处理器和定序器。 定序器被配置为：估计完成执行分配给非易失性存储器的通道的一组原子命令所需的时间间隔; 对于所述多个原子命令中的每一个计算与完成执行分配给所述通道的所述原子命令集合所需的时间间隔期满之后完成对应的存储器命令的执行相关联的紧急度值; 基于所计算出的紧急度，安排所述原子命令集中的所述多个原子命令中的每一个，以由所述非易失性存储器执行; 并将多个原子命令输出到非易失性存储器，以按预定顺序执行。