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公开(公告)号:US11810495B2
公开(公告)日:2023-11-07
申请号:US17960435
申请日:2022-10-05
发明人: Byoungyoon Jang , Yong Hoon Yu , Se Whan Na , Jong-Hee Na , Hyeonsu Park
IPC分类号: G09G3/20
CPC分类号: G09G3/2044 , G09G2320/0233 , G09G2320/0626 , G09G2360/145
摘要: Disclosed is a display driver integrated circuit (IC) which includes a data line driver that drives a first data line connected with a first pixel of a display in response to output image data, and a dithering circuit that receives a brightness value of the display, calculates a first reference grayscale value corresponding to the brightness value using a first group of threshold grayscale values, receives input image data with a first grayscale value, which corresponds to the first pixel, compares the first grayscale value and the first reference grayscale value, and generates the output image data having not the first grayscale value but an output grayscale value when the first grayscale value is smaller than the first reference grayscale value.
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公开(公告)号:US20210319770A1
公开(公告)日:2021-10-14
申请号:US17221461
申请日:2021-04-02
发明人: Unki Park , Minsik Kim , Hyeonsu Park , Jonghyuk Lee , Hyunwook Lim , Woohyuk Jang
摘要: A display driving circuit for driving a display panel, including a first memory configured to store main image data received from outside of the display driving circuit; a second memory configured to store first additional image data in a normal mode, and to store second additional image data in an Always On Display (AOD) mode having lower power consumption than the normal mode; a normal mode controller configured to operate in the normal mode according to the first additional image data stored in the second memory; and an AOD mode controller configured to operate in the AOD mode according to the main image data stored in the first memory and the second additional image data stored in the second memory.
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公开(公告)号:US11138937B2
公开(公告)日:2021-10-05
申请号:US16829244
申请日:2020-03-25
发明人: Unki Park , Minsik Kim , Hyeonsu Park , Hyunwook Lim , Woohyuk Jang
IPC分类号: G09G3/3258
摘要: A display driving circuit for driving a display panel includes a control logic that adjusts brightness of a first partial area by adjusting pixel data values included in partial image data to be displayed on the first partial area of the display panel based on received brightness control information, and a data driver that generates image signals by digital-analog conversion of pixel data values provided from the control logic, the data driver providing the image signals to the display panel.
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公开(公告)号:US12106736B2
公开(公告)日:2024-10-01
申请号:US17807237
申请日:2022-06-16
发明人: Jinyong Park , Hongki Kwon , Taewoo Kim , Hyeonsu Park , Hyunwook Lim , Hojun Chung
CPC分类号: G09G5/393 , G09G3/3696 , G09G2330/021 , G09G2360/18
摘要: A display driver integrated circuit includes a frame buffer, a plurality of image processing circuits and an image processing controller. The frame buffer sequentially stores a plurality of frame data received from a host processor. Each of the plurality of frame data includes a plurality of data slices. The image processing circuits perform image signal processing operations, respectively, on ones of the data slices that are included in a respective one of the plurality of frame data and which are sequentially retrieved from the frame buffer. The image processing controller bypasses at least one of the image processing circuits by applying a bypass control signal to the image processing circuits based on a first plurality of data slices included in a first one of the plurality of frame data and a second plurality of data slices included in a second one of the plurality of frame data.
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公开(公告)号:US11847952B2
公开(公告)日:2023-12-19
申请号:US17367471
申请日:2021-07-05
发明人: Pilseung Heo , Jinyong Park , Hyeonsu Park , Hyunwook Lim
CPC分类号: G09G3/2074 , G09G5/10 , G09G2320/0233 , G09G2320/0242 , G09G2320/0285 , G09G2320/0626
摘要: A luminance compensator includes a memory device and a luminance compensation circuit. The memory device stores a plurality of luminance compensation data and provides first luminance compensation data and second luminance compensation data among the plurality of luminance compensation data in response to a frame rate dimming-on signal. The first luminance compensation data corresponds to a first frame rate. The second luminance compensation data corresponds to a second frame rate. The plurality of luminance compensation data is for compensating luminance of at least one region that operates with a plurality of frame rates. The frame rate dimming-on signal represents time intervals in which frame rates of the at least one region are gradually changed. The luminance compensation circuit generates third luminance compensation data in response to the frame rate dimming-on signal, the first luminance compensation data, and the second luminance compensation data.
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公开(公告)号:US11935474B2
公开(公告)日:2024-03-19
申请号:US17957439
申请日:2022-09-30
发明人: Unki Park , Sewhan Na , Jonghyuk Lee , Hyeonsu Park , Hyunwook Lim
IPC分类号: G06V40/13 , G09G3/3233 , H10K59/65
CPC分类号: G09G3/3233 , H10K59/65 , G09G2300/0439 , G09G2320/0686
摘要: A display device includes a display panel including an under display camera (UDC) region and a non-UDC region, the UDC region including a plurality of sub-regions, and processing circuitry configured to, receive image data, select at least one first filter from a plurality of filters based on a spatial coordinate value of the received image data, the plurality of filters corresponding to a respective sub-region of the plurality of sub-regions, and perform first pixel rendering for the UDC region based on the at least one first filter and the image data, and the at least one first filter is generated based on a pixel arrangement pattern of the UDC region.
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公开(公告)号:US11817067B2
公开(公告)日:2023-11-14
申请号:US17221461
申请日:2021-04-02
发明人: Unki Park , Minsik Kim , Hyeonsu Park , Jonghyuk Lee , Hyunwook Lim , Woohyuk Jang
CPC分类号: G09G5/393 , G04G9/0082 , G09G5/395 , G09G2330/023 , G09G2360/06
摘要: A display driving circuit for driving a display panel, including a first memory configured to store main image data received from outside of the display driving circuit; a second memory configured to store first additional image data in a normal mode, and to store second additional image data in an Always On Display (AOD) mode having lower power consumption than the normal mode; a normal mode controller configured to operate in the normal mode according to the first additional image data stored in the second memory; and an AOD mode controller configured to operate in the AOD mode according to the main image data stored in the first memory and the second additional image data stored in the second memory.
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公开(公告)号:US20230137060A1
公开(公告)日:2023-05-04
申请号:US17807237
申请日:2022-06-16
发明人: Jinyong Park , Hongki Kwon , Taewoo Kim , Hyeonsu Park , Hyunwook Lim , Hojun Chung
摘要: A display driver integrated circuit includes a frame buffer, a plurality of image processing circuits and an image processing controller. The frame buffer sequentially stores a plurality of frame data received from a host processor. Each of the plurality of frame data includes a plurality of data slices. The image processing circuits perform image signal processing operations, respectively, on ones of the data slices that are included in a respective one of the plurality of frame data and which are sequentially retrieved from the frame buffer. The image processing controller bypasses at least one of the image processing circuits by applying a bypass control signal to the image processing circuits based on a first plurality of data slices included in a first one of the plurality of frame data and a second plurality of data slices included in a second one of the plurality of frame data.
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公开(公告)号:US11594181B2
公开(公告)日:2023-02-28
申请号:US17492985
申请日:2021-10-04
发明人: Unki Park , Minsik Kim , Hyeonsu Park , Hyunwook Lim , Woohyuk Jang
IPC分类号: G09G3/3258
摘要: A display driving circuit for driving a display panel includes a control logic that adjusts brightness of a first partial area by adjusting pixel data values included in partial image data to be displayed on the first partial area of the display panel based on received brightness control information, and a data driver that generates image signals by digital-analog conversion of pixel data values provided from the control logic, the data driver providing the image signals to the display panel.
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