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公开(公告)号：US11758030B2
公开(公告)日：2023-09-12
申请号：US17679412
申请日：2022-02-24
发明人： Yong-Yun Park , Kyungho Ryu , Kilhoon Lee , Hyunwook Lim , Youngmin Choi , Kyungae Kim
IPC分类号： H04L69/324 , H04L47/43
CPC分类号： H04L69/324 , H04L47/43
摘要： Disclosed is an operating method of an encoder, which includes receiving a first bit stream including first to N-th bits, determining at least one symbol in the first bit stream, wherein the at least one symbol includes “M” consecutive bits each having the first bit value or the second bit value, and generating a first data packet including a first header and at least one packet symbol. The first header includes a least symbol address of a first symbol of the at least one symbol and an inverted value of a bit value of the first bit, a first packet symbol of the at least one packet symbol includes a bit value of the first symbol, a least symbol address of a second symbol of the at least one symbol, and an inverted value of a bit value of a next bit of the first symbol.
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公开(公告)号：US11670258B2
公开(公告)日：2023-06-06
申请号：US17155487
申请日：2021-01-22
发明人： Hongki Kwon , Taewoo Kim , Jinyong Park , Hyunwook Lim , Woohyuk Jang , Hojun Chung
CPC分类号： G09G5/10 , G09G3/20 , G09G2320/0233 , G09G2320/0626 , G09G2320/0693 , G09G2330/08 , G09G2360/145
摘要： A method of luminance compensation includes; generating luminance compensation data based on test image data, each of the test image data corresponding to one gray level, and each of the luminance compensation data including compensation values corresponding to the one gray level, generating intra-plane data based on the luminance compensation data, one of the intra-plane data being generated based on one of the luminance compensation data, generating inter-plane stream data based on the intra-plane data, one of the inter-plane stream data being generated based on data blocks included in the intra-plane data and disposed at a same location within the intra-plane data, and sequentially storing the inter-plane stream data in a memory.
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公开(公告)号：US10885870B2
公开(公告)日：2021-01-05
申请号：US16814535
申请日：2020-03-10
发明人： Kyongho Kim , Jinho Kim , Jaeyoul Lee , Hyunwook Lim , Youngmin Choi
IPC分类号： G09G5/00
摘要： An electronic device includes; a timing controller that generates a command to-be-sent to a display driver integrated circuit (DDI) selected from among a plurality of display driver integrated circuits (DDIs) connected to the timing controller through data lines and a shared channel The DDI is selected by a DDI control signal transferred from the timing controller to the DDI through a corresponding data line among the data lines, and the command is transferred from the timing controller to the DDI through the shared channel.
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公开(公告)号：US12067201B2
公开(公告)日：2024-08-20
申请号：US18200402
申请日：2023-05-22
发明人： Junchul Park , Jonghee Na , Gwangho Nam , Taekon Yu , Hyunwook Lim , Woohyuk Jang , Bumsoo Kim , Byunghwee Park , Wongab Jung , Yoon-Kyung Choi
IPC分类号： G06F3/044 , G06F3/041 , G09G3/3233
CPC分类号： G06F3/0445 , G06F3/0412 , G06F3/04164 , G06F3/04166 , G06F3/0418 , G06F3/0446 , G09G3/3233 , G09G2320/0223 , G09G2320/0295 , G09G2354/00
摘要： A touch sensor controller for driving a touch sensor that is stacked on a display panel and includes driving electrodes and receiving electrodes crossing the driving electrodes, the touch sensor controller including: a driving circuit configured to sequentially provide driving signals to the driving electrodes; a read-out circuit configured to, in response to the driving signals, generate touch data based on first sensing signals received from the receiving electrodes and generate display noise data based on a second sensing signal received from a first driving electrode to which a driving signal of the driving signals is not applied from among the driving electrodes; and a touch processor configured to determine whether a touch input has occurred on the touch sensor based on the touch data and the display noise data.
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5.发明授权公开(公告)号：US11996065B2
公开(公告)日：2024-05-28
申请号：US17985599
申请日：2022-11-11
发明人： Kyungho Ryu , Kyongho Kim , Yongyun Park , Kilhoon Lee , Yeongcheol Rhee , Taeho Lee , Hyunwook Lim
IPC分类号： G09G5/00
CPC分类号： G09G5/008 , G09G2370/04
摘要： Provided is a display driving circuit. The display driving circuit includes a clock data recovery circuit configured to receive a data signal and generate a clock signal and a first output data signal, an eye margin test circuit configured to sample the data signal by using the clock signal, based on a vertical measurement voltage and generate a second output data signal, and a bit error check circuit configured to measure a bit error rate of the data signal, based on the first output data signal and the second output data signal, wherein the clock data recovery circuit includes a jitter generator configured to generate jitter of the clock signal such that a jitter amplitude varies according to a horizontal control signal.
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6.发明授权公开(公告)号：US11810535B2
公开(公告)日：2023-11-07
申请号：US17393691
申请日：2021-08-04
发明人： Taewoo Kim , Hongki Kwon , Jaehun Kim , Jinyong Park , Jaeyoul Lee , Hyunwook Lim , Woohyuk Jang , Hojun Chung
CPC分类号： G09G5/393 , G06T5/003 , G06T5/50 , G06T2207/20201 , G09G2310/0297 , G09G2320/0261 , G09G2320/106 , G09G2340/02 , G09G2360/18
摘要： A display driver circuit includes a receiver that receives a still image or a moving image, a frame buffer that stores the still image received by the receiver in a still image mode, an image processor that performs an image enhancement operation on the moving image transferred from the receiver or the still image transferred from the frame buffer, and a motion processor that performs a motion compensation operation using a current frame output from the image processor and a previous frame stored in the frame buffer in a moving image mode. The previous frame is data which, in the moving image mode, are processed by the image processor before the current frame and are then stored in the frame buffer. The previous frame is output from the frame buffer to the motion processor in synchronization with the current frame.
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公开(公告)号：US11769434B2
公开(公告)日：2023-09-26
申请号：US17412965
申请日：2021-08-26
发明人： Jinyong Park , Hongki Kwon , Taewoo Kim , Yonghoon Yu , Hyunwook Lim , Byeongcheol Jang , Woohyuk Jang , Hojun Chung
CPC分类号： G09G3/20 , G06T1/20 , G06T1/60 , G06T9/00 , G09G2310/0275 , G09G2310/0291 , G09G2330/021 , G09G2340/02
摘要： A display driver circuit receives externally-encoded image data and processes the data using a memory (graphic RAM), an internal encoder, and an external decoder configured to operate on the externally-encoded image data. The processed data is provided to a display device by a source driver of the display driver circuit. Data is processed through the graphic RAM and an internal decoder or the external decoder depending on whether a slice of the data is a currently received update slice, a recently received standby slice, or a still slice.
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公开(公告)号：US11908364B2
公开(公告)日：2024-02-20
申请号：US17462646
申请日：2021-08-31
发明人： Byeongcheol Jang , Yonghoon Yu , Hongki Kwon , Taewoo Kim , Jinyong Park , Hyunwook Lim , Woohyuk Jang , Hojun Chung
CPC分类号： G09G3/20 , G09G5/003 , G09G2320/103 , G09G2330/021 , G09G2340/02 , G09G2360/12 , G09G2370/08
摘要： Provided are a low-power display driving circuit performing internal encoding and decoding and an operating method thereof. The display driving circuit includes a memory configured to store an input bit stream encoded by an encoder and a controller configured to determine a data path through which output frame data in a second frame period passes according to whether internal encoding is successful in a first frame period, wherein, when the internal encoding is successful, the controller performs internal encoding in the second frame period, stores a generated internal bit stream in the memory, allows the internal bit stream to pass through a low-power path to generate the output frame data, and when the internal encoding fails, the controller generates the output frame data by allowing the input bit stream to pass through a normal path in the second frame period, changes an encoding setting of an internal encoder, and repeats the internal encoding.
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公开(公告)号：US11658853B2
公开(公告)日：2023-05-23
申请号：US17680583
申请日：2022-02-25
发明人： Younghwan Chang , Eun-Young Jin , Youngseo Kim , Kilhoon Lee , Hyunwook Lim , Seng-Sub Chun
摘要： An operation method of a receiver, which includes setting a coefficient of an equalizer based on one of a plurality of first codes, setting a coefficient of an amplifier based on one of a plurality of second codes, performing offset calibration by driving the equalizer and the amplifier based on the coefficient of the equalizer and the coefficient of the amplifier, storing an offset code corresponding to a voltage offset generated when the equalizer and the amplifier are driven, determining whether the offset calibration is completed, performing a normal operation of obtaining reception data from an input signal, in response to determining that the offset calibration is completed, and removing the voltage offset based on the offset code, in the normal operation.
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公开(公告)号：US11574612B2
公开(公告)日：2023-02-07
申请号：US17212286
申请日：2021-03-25
发明人： Unki Park , Se Whan Na , Hyunwook Lim , Woohyuk Jang
摘要： An electronic device includes a display panel that includes a first region including first pixel groups and a second region including second pixel groups, and a compensation circuit. The compensation circuit may receive first image data. The compensation circuit may compensate to generate second image data in response to a determination that the first image data corresponds to at least one of one or more particular first pixel groups that are adjacent to a boundary between the first region and the second region or one or more particular second pixel groups that are adjacent to the boundary. The compensation circuit outputs the second image data to the display panel.
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