公开(公告)号：US20210035309A1

公开(公告)日：2021-02-04

申请号：US16969026

申请日：2019-03-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungho KANG ,  Yunjae LIM ,  Hyungdal KWON ,  Cheon LEE

IPC: G06T7/246 ,  G06T7/254 ,  G06K9/62 ,  G06N3/08

Abstract: An electronic device and a control method therefor are disclosed. A method for controlling an electronic device according to the present invention comprises the steps of: receiving a current frame; determining a region, within the current frame, where there is a movement, on the basis of a prior frame and the current frame; inputting the current frame into an artificial intelligence learning model on the basis of the region where there is the movement, to obtain information relating to at least one object included in the current frame; and determining the object included in the region where there is the movement, by using the obtained information relating to the at least one object. Therefore, electronic device can rapidly determine an object included in a frame configuring a captured image.

公开(公告)号：US20200380363A1

公开(公告)日：2020-12-03

申请号：US16970859

申请日：2019-02-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyungdal KWON ,  Sungho KANG ,  Cheon LEE ,  Yunjiae LIM

IPC: G06N3/08

Abstract: The disclosure relates to an artificial intelligence (AI) system that simulates functions such as cognition and judgment of the human brain by utilizing machine learning algorithms such as deep learning and its applications. In particular, the disclosure provides a method of controlling data input and output of a fully connected network according to an artificial intelligence system and its applications, the method including receiving, from a learning circuit, an edge sequence representing a connection relationship between nodes included in a current layer of the fully connected network, generating a compressed edge sequence that compresses consecutive invalid bits among bit strings constituting the edge sequence into one bit and a validity determination sequence determining valid and invalid bits among the bit strings constituting the compressed edge sequence, writing the compressed edge sequence and the validity determination sequence to the memory, and sequentially reading the compressed edge sequences from the memory based on the validity determination sequence such that the valid bits are sequentially output to the learning circuit.

公开(公告)号：US20210250028A1

公开(公告)日：2021-08-12

申请号：US17242737

申请日：2021-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungdal KWON ,  Seungwook LEE ,  Youngnam HWANG

IPC: H03K19/1776 ,  G06F30/327

Abstract: An electronic system and an operation method thereof are disclosed. A method of an electronic system including a field programmable gate array (FPGA) includes: synthesizing, by processing circuitry, code of a high level language into code of a hardware description language; designing, by the processing circuitry, a circuit of an intellectual property (IP) block included in the field programmable gate array according to the code of the hardware description language; and generating, by the processing circuitry, a database containing reference assembly code corresponding to the code of the high level language and information about a circuit configuration of the intellectual property block.

公开(公告)号：US20190258932A1

公开(公告)日：2019-08-22

申请号：US16281737

申请日：2019-02-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungho KANG ,  Hyungdal KWON ,  Cheon LEE ,  Yunjae LIM

IPC: G06N3/08 ,  G06F7/58 ,  G06N3/04

Abstract: An encoding apparatus connected to a learning circuit processing learning of a deep neural network and configured to perform encoding for reconfiguring connection or disconnection of a plurality of edges in a layer of the deep neural network using an edge sequence generated based on a random number sequence and dropout information indicating a ratio between connected edges and disconnected edges of a plurality of edges included in a layer of the deep neural network.