Method and apparatus for estimating aging of integrated circuit

    公开(公告)号:US11972185B2

    公开(公告)日:2024-04-30

    申请号:US16919157

    申请日:2020-07-02

    CPC classification number: G06F30/3308 G06F2119/04

    Abstract: A method of estimating aging of an integrated circuit (IC) includes: obtaining a first process design kit (PDK) including a plurality of first device models corresponding to a plurality of devices provided by a process of fabricating the IC; obtaining values of aging parameters of device instances included in a netlist defining the IC, by performing a first circuit simulation based on the netlist and the first PDK; and obtaining aging data of the IC by performing a second circuit simulation based on the values of the aging parameters and the netlist, wherein each of the plurality of first device models includes at least one measurement command to be executed in the first circuit simulation to calculate an aging parameter.

    METHOD AND APPARATUS FOR ESTIMATING AGING OF INTEGRATED CIRCUIT

    公开(公告)号:US20210165940A1

    公开(公告)日:2021-06-03

    申请号:US16919157

    申请日:2020-07-02

    Abstract: A method of estimating aging of an integrated circuit (IC) includes: obtaining a first process design kit (PDK) including a plurality of first device models corresponding to a plurality of devices provided by a process of fabricating the IC; obtaining values of aging parameters of device instances included in a netlist defining the IC, by performing a first circuit simulation based on the netlist and the first PDK; and obtaining aging data of the IC by performing a second circuit simulation based on the values of the aging parameters and the netlist, wherein each of the plurality of first device models includes at least one measurement command to be executed in the first circuit simulation to calculate an aging parameter.

Patent Agency Ranking