公开(公告)号：US20170345768A1

公开(公告)日：2017-11-30

申请号：US15609183

申请日：2017-05-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-hyuk KIM ,  Sang-hyun LEE ,  Sung-jin KIM ,  Yong-cheol SEO ,  Jin-kuk BAE

IPC: H01L23/544 ,  H01L21/78 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/544 ,  H01L21/76874 ,  H01L21/78 ,  H01L21/784 ,  H01L21/822 ,  H01L23/3157 ,  H01L23/3171 ,  H01L23/562 ,  H01L23/585 ,  H01L24/06 ,  H01L24/14 ,  H01L2223/5446

Abstract: A semiconductor device includes a semiconductor substrate including a main chip region and a remaining scribe lane region surrounding the main chip region, a passivation layer on the main chip region, the passivation layer including a plurality of bridge patterns extending from the main chip region in a first direction across the remaining scribe lane region, a plurality of bump pads exposed by the passivation layer on the main chip region, a plurality of dam structures along edges of the main chip region on the remaining scribe lane region, the plurality of bridge patterns arranged on the plurality of dam structures at a first pitch in the first direction, a seed layer on the plurality of bump pads, and bumps on the seed layer.