公开(公告)号：US20250062297A1

公开(公告)日：2025-02-20

申请号：US18678191

申请日：2024-05-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinwon CHAE ,  Taehong MIN ,  Daehan SONG ,  Inwook JUNG

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/538 ,  H10B80/00

Abstract: A semiconductor package may comprise an interposer substrate including a substrate and a lower protective layer, a through-via passing through the substrate and the lower protective layer, a lower pad on the lower protective layer and in contact with the through-via, an interlayer insulating layer on an upper surface of the substrate, and an interconnection structure in the interlayer insulating layer, a plurality of first semiconductor chips on an upper surface of the interposer substrate and electrically connected to the interconnection structure, a second semiconductor chip on the upper surface of the interposer substrate apart from the plurality of first semiconductor chips and electrically connected to the interconnection structure, an encapsulant covering at least a portion of the plurality of first semiconductor chips and the second semiconductor chip and connection conductors on the lower surface of the lower protective layer and electrically connected to the lower pad.