公开(公告)号：US20190294748A1

公开(公告)日：2019-09-26

申请号：US16280205

申请日：2019-02-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JONGWOOK JEON ,  YEOIL YUN ,  SANGWOO PAE ,  UIHUI KWON ,  KEUNHO LEE

IPC: G06F17/50

Abstract: A method of designing a semiconductor circuit using a circuit simulation tool executed by a computer includes calculating power consumptions of elements of the semiconductor circuit by use of the circuit simulation tool. A thermal netlist is created about the semiconductor circuit, based on the power consumptions and geometry information of each of the elements. A simulation of the semiconductor circuit is performed with the thermal netlist using the circuit simulation tool to detect a temperature of each of the elements. The thermal netlist includes thermal capacitance information of each of the elements.

公开(公告)号：US20210143181A1

公开(公告)日：2021-05-13

申请号：US17153939

申请日：2021-01-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： JAE-WOO SEO ,  KI-MAN PARK ,  HA-YOUNG KIM ,  JUNGHWAN SHIN ,  KEUNHO LEE ,  SUNGWE CHO

IPC: H01L27/118 ,  H01L27/02 ,  H03K3/3562

Abstract: Disclosed is a semiconductor device including a substrate with first and second regions adjacent to each other in a first direction, and first to third gate electrodes extending from the first region toward the second region. Each of the first and second regions includes a PMOSFET region and an NMOSFET region. The first to third gate electrodes extend in the first direction and are sequentially arranged in a second direction different from the first direction. The first and third gate electrodes are supplied with a first signal. The second gate electrode is supplied with a second signal that is an inverted signal of the first signal. The first gate electrode includes a first gate of the first region and a first gate of the second region. The first gates are aligned and connected with each other in the first direction.

公开(公告)号：US20200161334A1

公开(公告)日：2020-05-21

申请号：US16669639

申请日：2019-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： JAE-WOO SEO ,  KI-MAN PARK ,  HA-YOUNG KIM ,  JUNGHWAN SHIN ,  KEUNHO LEE ,  SUNGWE CHO

IPC: H01L27/118 ,  H01L27/02 ,  H03K3/3562

Abstract: Disclosed is a semiconductor device including a substrate with first and second regions adjacent to each other in a first direction, and first to third gate electrodes extending from the first region toward the second region. Each of the first and second regions includes a PMOSFET region and an NMOSFET region. The first to third gate electrodes extend in the first direction and are sequentially arranged in a second direction different from the first direction. The first and third gate electrodes are supplied with a first signal. The second gate electrode is supplied with a second signal that is an inverted signal of the first signal. The first gate electrode includes a first gate of the first region and a first gate of the second region. The first gates are aligned and connected with each other in the first direction.

公开(公告)号：US20190130059A1

公开(公告)日：2019-05-02

申请号：US16233422

申请日：2018-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JONGWOOK JEON ,  YEOIL YUN ,  SANGWOO PAE ,  UIHUI KWON ,  KEUNHO LEE

IPC: G06F17/50

Abstract: A method of designing a semiconductor circuit using a circuit simulation tool executed by a computer includes calculating power consumptions of elements of the semiconductor circuit by use of the circuit simulation tool. A thermal netlist is created about the semiconductor circuit, based on the power consumptions and geometry information of each of the elements. A simulation of the semiconductor circuit is performed with the thermal netlist using the circuit simulation tool to detect a temperature of each of the elements. The thermal netlist includes thermal capacitance information of each of the elements.