公开(公告)号：US20250142956A1

公开(公告)日：2025-05-01

申请号：US18659726

申请日：2024-05-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jisoo Park ,  JUNG HAN LEE ,  KWANYOUNG CHUN ,  Kwangmuk LEE

IPC: H01L27/092 ,  H01L21/822 ,  H01L21/8238 ,  H01L23/528 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: Disclosed is a three-dimensional semiconductor device comprising a substrate including first and second regions, a first active section on the first region and including a first lower channel pattern and a first lower source/drain pattern, a second active section on the first active section and including a first upper channel pattern and a first upper source/drain pattern, a third active section on the second region and including a second lower channel pattern and a second lower source/drain pattern, a fourth active section on the third active section and including a second upper channel pattern and a second upper source/drain pattern, and a gate electrode on the first and second lower channel patterns and the first and second upper channel patterns. A first width in a first direction of the first lower channel pattern is greater than a second width in the first direction of the second lower channel pattern.