公开(公告)号：US11482522B2

公开(公告)日：2022-10-25

申请号：US16583322

申请日：2019-09-26

Applicant: Samsung Electronics Co., Ltd. ,  Seoul National University R&DB Foundation

Inventor： Mun Hyeon Kim ,  Byung Gook Park ,  Keun Hwi Cho ,  Si Hyun Kim ,  Ki Tae Lee

IPC: H01L27/088 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/306

Abstract: Semiconductor devices are provided. A semiconductor device includes a gate structure extending in a first direction. The semiconductor device includes an active pattern intersecting the gate structure and having a width in the first direction and a height in a second direction. The width is smaller than the height. Moreover, the semiconductor device includes a source/drain region electrically connected to the active pattern.

公开(公告)号：US12266656B2

公开(公告)日：2025-04-01

申请号：US17210751

申请日：2021-03-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mun Hyeon Kim ,  Sung Min Kim ,  Dae Won Ha

IPC: H01L27/092 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor device includes a substrate with first and second regions separated from each other, a laminate structure including at least one sacrificial layer and at least one active layer alternately stacked on the substrate, a first isolation insulating layer on the laminate structure on the first region, a second isolation insulating layer on the laminate structure on the second region, the second isolation insulating layer having a same thickness as the first isolation insulating layer, a first upper active pattern spaced apart from the first isolation insulating layer, a first gate electrode surrounding at least a portion of the first upper active pattern, a second upper active pattern spaced apart from the second isolation insulating layer, and a second gate electrode surrounding at least a portion of the second upper active pattern, wherein top surfaces of the first and second isolation insulating layers are at different heights.

公开(公告)号：US12261204B2

公开(公告)日：2025-03-25

申请号：US18615049

申请日：2024-03-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mun Hyeon Kim ,  Kern Rim ,  Dae Won Ha

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first horizontal direction on the substrate, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, a source/drain region on at least one side of the gate electrode, a source/drain contact extending into the source/drain region and including a filling layer and a barrier layer along a sidewall of the filling layer, and a silicide layer between the source/drain region and the filling layer, the silicide layer including a first sidewall in contact with the filling layer and a second sidewall in contact with the source/drain region, wherein the barrier layer is not between the filling layer and the source/drain region.

公开(公告)号：US20240243171A1

公开(公告)日：2024-07-18

申请号：US18615049

申请日：2024-03-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mun Hyeon Kim ,  Kern Rim ,  Dae Won Ha

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L29/0665 ,  H01L21/823418 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/7845 ,  H01L29/78618

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first horizontal direction on the substrate, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, a source/drain region on at least one side of the gate electrode, a source/drain contact extending into the source/drain region and including a filling layer and a barrier layer along a sidewall of the filling layer, and a silicide layer between the source/drain region and the filling layer, the silicide layer including a first sidewall in contact with the filling layer and a second sidewall in contact with the source/drain region, wherein the barrier layer is not between the filling layer and the source/drain region.

公开(公告)号：US11973111B2

公开(公告)日：2024-04-30

申请号：US17509646

申请日：2021-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mun Hyeon Kim ,  Kern Rim ,  Dae Won Ha

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L29/0665 ,  H01L21/823418 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/7845 ,  H01L29/78618

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first horizontal direction on the substrate, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, a source/drain region on at least one side of the gate electrode, a source/drain contact extending into the source/drain region and including a filling layer and a barrier layer along a sidewall of the filling layer, and a silicide layer between the source/drain region and the filling layer, the silicide layer including a first sidewall in contact with the filling layer and a second sidewall in contact with the source/drain region, wherein the barrier layer is not between the filling layer and the source/drain region.

公开(公告)号：US20220285493A1

公开(公告)日：2022-09-08

申请号：US17509646

申请日：2021-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mun Hyeon Kim ,  Kern Rim ,  Dae Won Ha

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L29/786 ,  H01L21/8234

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first horizontal direction on the substrate, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, a source/drain region on at least one side of the gate electrode, a source/drain contact extending into the source/drain region and including a filling layer and a barrier layer along a sidewall of the filling layer, and a silicide layer between the source/drain region and the filling layer, the silicide layer including a first sidewall in contact with the filling layer and a second sidewall in contact with the source/drain region, wherein the barrier layer is not between the filling layer and the source/drain region.