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公开(公告)号:US20240345758A1
公开(公告)日:2024-10-17
申请号:US18534379
申请日:2023-12-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jinwoo Park , Minji Kim , Sangwon Jung
IPC: G06F3/06
CPC classification number: G06F3/0652 , G06F3/0604 , G06F3/0656 , G06F3/0688
Abstract: Disclosed is a storage device which includes nonvolatile memory devices each including a plurality of memory blocks, a memory controller that controls the nonvolatile memory devices, and a buffer memory that buffers data to be written in the nonvolatile memory devices. In an on-time erase operation, the memory controller controls the nonvolatile memory devices such that an erase operation is performed in a memory block for each of the nonvolatile memory devices. When an early erase condition is satisfied, the memory controller selects nonvolatile memory device among the nonvolatile memory devices and controls the selected nonvolatile memory device such that the erase operation is performed in a memory block of the selected nonvolatile memory device. When a free capacity of the buffer memory is smaller than a first threshold value, the memory controller determines that the early erase condition is satisfied.
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公开(公告)号:US20240272830A1
公开(公告)日:2024-08-15
申请号:US18434913
申请日:2024-02-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangwon Jung
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0611 , G06F3/0658 , G06F3/0679
Abstract: A storage controller including: an internal event monitoring circuit to detect an internal event, the internal event being independently performed in the storage controller; a duration calculation circuit to calculate expected processing times of the internal event based on allocation ratios; a latency mapping table to output expected latencies in processing the internal event for the allocation ratios; and an update circuit to generate and provide multi-latency information to a host, wherein the multi-latency information includes an indicator representing the internal event and the expected processing times and the expected latencies corresponding to the allocation ratios, each allocation ratio representing a ratio of a resource, allocated to process the internal event, to a resource allocated to process a command requested by the host, and the storage controller is configured to allocate resources for processing the command and the internal event, based on an allocation ratio selected by the host.
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公开(公告)号:US11474735B2
公开(公告)日:2022-10-18
申请号:US16943000
申请日:2020-07-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangwon Jung , Jinsoo Yoo , Hyeongyu Cho
IPC: G06F3/06 , G06F5/06 , G06F11/16 , G06F12/02 , G06F13/22 , G06F13/38 , H04L12/40 , H04L47/10 , H04L47/25 , H04L47/41
Abstract: An operation method of a storage device configured to communicate with an external device through an interface channel includes receiving an indicator of a first throttling level of a plurality of throttling levels from the external device, setting a first operation parameter based on a throttling predefined table (PDT) including a relationship between the plurality of throttling levels and a plurality of throttling performances, such that the interface channel has a first throttling performance from among the plurality of throttling performances, the first throttling performance corresponding to the first throttling level, receiving a first input/output (I/O) request from the external device through the interface channel having the first throttling performance caused by the setting of the first operation parameter, and processing a first operation corresponding to the first I/O request through the interface channel having the first throttling performance.
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公开(公告)号:US12066905B2
公开(公告)日:2024-08-20
申请号:US17511752
申请日:2021-10-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangwon Jung , Mincheol Kwon
CPC classification number: G06F11/1658 , G06F12/0246 , G06F13/161
Abstract: Disclosed is an operating method of a storage device which includes a plurality of nonvolatile memory chips. The method includes providing, at the storage device, information of a capacity of each of the plurality of nonvolatile memory chips to an external host device, receiving, at the storage device, information of a plurality of groups from the external host device, performing a reset after receiving the information of the plurality of groups, mapping, at the storage device, the plurality of nonvolatile memory chips with the plurality of groups, and configuring the plurality of nonvolatile memory chips so as to correspond to the plurality of groups, after performing the reset.
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公开(公告)号:US11861192B2
公开(公告)日:2024-01-02
申请号:US17526243
申请日:2021-11-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Minji Kim , Sangwon Jung
CPC classification number: G06F3/0634 , G06F3/064 , G06F3/0617 , G06F3/0619 , G06F3/0659 , G06F3/0679
Abstract: Disclosed is an operating method of a storage controller communicating with a host and memory regions, which includes receiving a write request for a first memory region of the memory regions from the host, determining the first memory region as unavailable, based on a status information set, generating redirection information indicating that a second memory region of the memory regions is selected instead of the first memory region, performing a write operation in the second memory region based on the redirection information, updating status information of the second memory region in the status information set based on the write operation, outputting redirection result information indicating that write data of the write request are processed in the second memory region, to the host, and receiving a read request corresponding to the write data and including information of the second memory region from the host.
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公开(公告)号:US11175852B2
公开(公告)日:2021-11-16
申请号:US16944368
申请日:2020-07-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangwon Jung , Mincheol Kwon
IPC: G06F3/06
Abstract: An method of a storage device configured to communicate with an external device through an interface channel includes: storing a throttling predefined table (PDT) including a relationship between target performances and workload characteristics; detecting that a first workload characteristic has changed; determining whether to update the PDT; when it is determined to update the PDT, monitoring a performance of the storage device; updating the PDT to include at least one new value for the workload characteristics and an additional target throttling performance value, based on a calculated monitored performance and the changed value of the first workload characteristic; controlling an operation parameter based on the updated PDT such that the interface channel has a first throttling performance corresponding to the additional target throttling performance value; receiving a first request through the interface channel from the external device; and processing the first I/O request through the interface channel.
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