ELECTRONIC APPARATUS AND METHOD FOR PHOTOGRAPHING IMAGE THEREOF
    1.
    发明申请
    ELECTRONIC APPARATUS AND METHOD FOR PHOTOGRAPHING IMAGE THEREOF 审中-公开
    电子设备及其摄影图像的方法

    公开(公告)号:US20150146079A1

    公开(公告)日:2015-05-28

    申请号:US14296770

    申请日:2014-06-05

    Inventor: Tae-hyun Kim

    CPC classification number: H04N5/23212 H04N5/23293

    Abstract: A method for photographing an image by an electronic apparatus includes displaying an image as a live view; setting a plurality of focus areas from the image; when a photographing command is received, obtaining an Auto Focus (AF) evaluation value of a photographed image; detecting a plurality of focus positions corresponding to the plurality of focus areas by analyzing the AF evaluation value; and obtaining and storing a plurality of images corresponding to the plurality of detected focus positions.

    Abstract translation: 一种通过电子设备拍摄图像的方法包括将图像显示为实时视图; 从图像设置多个焦点区域; 当接收到拍摄命令时,获得拍摄图像的自动对焦(AF)评估值; 通过分析AF评价值来检测与多个聚焦区域对应的多个焦点位置; 以及获取和存储与所述多个检测到的焦点位置相对应的多个图像。

    Developing roller for image forming apparatus

    公开(公告)号:US09696652B2

    公开(公告)日:2017-07-04

    申请号:US14955499

    申请日:2015-12-01

    Inventor: Tae-hyun Kim

    CPC classification number: G03G15/0808 G03G15/0818 G03G15/0822

    Abstract: An electrophotographic image forming apparatus has a developing roller, wherein a glossiness of a surface of the developing roller is in a range of about 4 to about 15, the developing roller includes a plurality of protruding beads, a number average distance (Rsm) between the protruding beads is in a range of about 200 μm to about 400 μm, a supplying roller includes a plurality of foam cells, a number average size of the foam cells is in a range of about 300 μm to about 500 μm, and the developing roller is arranged to rotate at a rotation linear velocity that is about 120% to about 150% of a rotation linear velocity of a photoreceptor.

    Systems and methods of fabricating semiconductor devices

    公开(公告)号:US10885261B2

    公开(公告)日:2021-01-05

    申请号:US16670282

    申请日:2019-10-31

    Abstract: Patterns in an integrated circuit may be evaluated, and a semiconductor device may be fabricated based on the evaluation. The evaluation may include a extracting and superimposing first patterns corresponding to design patterns of the same shape from input layout data generated based on inspecting the integrated circuit, generating distribution data of the first patterns based on the superimposed first patterns, determining an evaluation contour of the design patterns based on an evaluation condition and the distribution data, and generating output layout data based on replacing the first patterns with second patterns each having the evaluation contour. Weak points in the integrated circuit may be detected based on the output layout data. The fabricating may include selectively incorporating an integrated circuit into a semiconductor device based on a determination that the integrated circuit includes less than a threshold quantity and/or threshold concentration of weak points.

    Systems and methods of fabricating semiconductor devices

    公开(公告)号:US10509885B2

    公开(公告)日:2019-12-17

    申请号:US15716856

    申请日:2017-09-27

    Abstract: Patterns in an integrated circuit may be evaluated, and a semiconductor device may be fabricated based on the evaluation. The evaluation may include a extracting and superimposing first patterns corresponding to design patterns of the same shape from input layout data generated based on inspecting the integrated circuit, generating distribution data of the first patterns based on the superimposed first patterns, determining an evaluation contour of the design patterns based on an evaluation condition and the distribution data, and generating output layout data based on replacing the first patterns with second patterns each having the evaluation contour. Weak points in the integrated circuit may be detected based on the output layout data. The fabricating may include selectively incorporating an integrated circuit into a semiconductor device based on a determination that the integrated circuit includes less than a threshold quantity and/or threshold concentration of weak points.

    SYSTEMS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES

    公开(公告)号:US20200065453A1

    公开(公告)日:2020-02-27

    申请号:US16670282

    申请日:2019-10-31

    Abstract: Patterns in an integrated circuit may be evaluated, and a semiconductor device may be fabricated based on the evaluation. The evaluation may include a extracting and superimposing first patterns corresponding to design patterns of the same shape from input layout data generated based on inspecting the integrated circuit, generating distribution data of the first patterns based on the superimposed first patterns, determining an evaluation contour of the design patterns based on an evaluation condition and the distribution data, and generating output layout data based on replacing the first patterns with second patterns each having the evaluation contour. Weak points in the integrated circuit may be detected based on the output layout data. The fabricating may include selectively incorporating an integrated circuit into a semiconductor device based on a determination that the integrated circuit includes less than a threshold quantity and/or threshold concentration of weak points.

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