公开(公告)号：US09864687B2

公开(公告)日：2018-01-09

申请号：US15198583

申请日：2016-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sik Kim ,  Woo Hyung Chun ,  Seong Min Jo ,  Jae Young Hur

IPC: G06F12/00 ,  G06F12/0831 ,  G06F12/14 ,  G06F13/00 ,  G06F13/28

CPC classification number: G06F12/0831 ,  G06F12/1433 ,  G06F2212/1016 ,  G06F2212/1052 ,  G06F2212/621

Abstract: An application processor is provided. The application processor includes a cache coherent interconnect, a first master device connected to the cache coherent interconnect, a second master device, and a master-side filter connected between the cache coherent interconnect and the second master device. The master-side filter receives a snoop request from the first master device through the cache coherent interconnect, compares a second security attribute of the second master device with a first security attribute of the first master device which is included in the snoop request, and determines whether to transmit an address included in the snoop request to the second master device according to a comparison result.

公开(公告)号：US10177913B2

公开(公告)日：2019-01-08

申请号：US14713120

申请日：2015-05-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heon Soo Lee ,  Yong Ki Lee ,  Sang Hyun Park ,  Mi Jung Noh ,  Hong Mook Choi ,  Dong Jin Park ,  Woo Hyung Chun

IPC: H04L9/14 ,  G06F13/42 ,  G09C1/00 ,  H04L9/08 ,  G06F21/60 ,  G06F21/84 ,  G06F21/85

Abstract: A semiconductor device may include: a bus; first and second function modules configured to communicate via the bus; a first encryption module configured to encrypt first data output from the first function module using a first encryption key to generate first encrypted data; and/or a second encryption module configured to decrypt the first encrypted data using the first encryption key, to output the decrypted first data to the second function module, and to encrypt second data output from the second function module using a second encryption key to generate second encrypted data. A semiconductor device may include: a bus; first and second modules configured to communicate via the bus; and/or an encryption module configured to use different encryption policies for first data, which is output from the first module and stored in a memory, and second data, which is output from the second module and stored in the memory.