公开(公告)号：US20240292597A1

公开(公告)日：2024-08-29

申请号：US18528621

申请日：2023-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghwan HUH ,  Daehyun KIM ,  Yeajin NA ,  Junsik YU ,  Taekyung YOON ,  Yoojin JEONG ,  Yongjun CHOI

IPC: H10B12/00

CPC classification number: H10B12/315 ,  H10B12/485 ,  H10B12/482

Abstract: Described is a semiconductor device comprising an active pattern, an additional active layer on the active pattern, and a gate structure that runs across the active pattern. The additional active layer includes a bottom surface connected to a sidewall of the active pattern and an upper curved surface at a level higher than a level of the bottom surface. A lattice contact of the additional active layer is different from that of the active pattern.