公开(公告)号：US20240057320A1

公开(公告)日：2024-02-15

申请号：US18309144

申请日：2023-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyumin KIM ,  Taeyong Song ,  Jaeyoung AN ,  Jieun LEE ,  Deoksung Hwang ,  Yejin Kwon

IPC: H10B12/00

CPC classification number: H10B12/482 ,  H10B12/0335 ,  H10B12/315

Abstract: A semiconductor device may include bit line structures extending in one direction on a substrate, insulation structures between the bit line structures and spaced apart from each other, and a landing pad structure in each of openings between the bit line structures and the insulation structures. The landing pad structure may include a first barrier metal pattern filling a portion of the opening, a second barrier metal pattern along a surface profile of the opening on the first barrier metal pattern, and a first metal pattern on the second barrier metal pattern. The second barrier metal pattern may have end portions on the bit line structures adjacent the opening. The first metal pattern may have an upper surface higher than an upper surface of the bit line structure. An uppermost surface of the first barrier metal pattern is lower than a lowermost surface of the first metal pattern.