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公开(公告)号:US4287571A
公开(公告)日:1981-09-01
申请号:US74272
申请日:1979-09-11
IPC分类号: G11C17/00 , G11C5/02 , G11C17/08 , G11C17/12 , G11C17/16 , H01L21/8246 , H01L23/528 , H01L27/112 , H01L29/78 , G11C11/40
CPC分类号: G11C17/16 , G11C5/02 , H01L23/528 , H01L27/112 , H01L2924/0002
摘要: An array of transistors suitable for use in a read only memory includes a plurality of spaced apart first conductive lines insulated from a semiconductor substrate and a plurality of spaced apart second conductive lines insulated from the substrate and from the first lines and disposed to intersect the first lines. Diffusion regions formed in the substrate as current carrying electrodes are defined by the first and second lines. A plurality of spaced apart third conductive lines are arranged to intersect the first and second lines and to connect to the diffusion regions. When the array is used in a read only memory, selected transistors of the array are made to have a different threshold voltage than that of the remaining transistors and the first and second lines form word lines, the third lines form bit or sense and ground lines and the diffusion regions form the source and drain regions of the transistors, with each diffusion region serving up to four transistors or cells.
摘要翻译: 适用于只读存储器的晶体管阵列包括与半导体衬底绝缘的多个间隔开的第一导电线和与衬底和第一线绝缘的多个间隔开的第二导线,并且设置成与第一 线条。 作为载流电极形成在基板中的扩散区域由第一和第二线限定。 多个间隔开的第三导线布置成与第一和第二线相交并连接到扩散区。 当阵列用于只读存储器时,阵列的所选晶体管被制成具有与剩余晶体管不同的阈值电压,并且第一和第二线形成字线,第三线形成位或感测线和接地线 并且扩散区域形成晶体管的源极和漏极区域,其中每个扩散区域用作四个晶体管或单元。