公开(公告)号：US20140298079A1

公开(公告)日：2014-10-02

申请号：US13931861

申请日：2013-06-29

Applicant: Silicon Graphics International Corp.

Inventor： Steven Dean

IPC: G06F11/20

CPC classification number: G06F12/0246 ,  G06F1/263 ,  G06F3/0635 ,  G06F11/2002 ,  G06F11/2007 ,  G06F11/201 ,  G06F11/2084 ,  G06F11/2089

Abstract: A high performance computing (HPC) system includes computing blades having a first region that includes computing circuit boards having processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation. The regions are connected by a plurality of power connectors that convey power from the computing circuit boards to the memory, and a plurality of data connectors that convey data between the first and second regions. The power and data connectors are configured redundantly so that failure of a computing circuit board, a power connector, or a data connector does not interrupt the computation. A method of performing such a computation, and a computer program product implementing the method, are also disclosed.

Abstract translation: 高性能计算（HPC）系统包括具有第一区域的计算刀片，所述第一区域包括具有用于执行计算的处理器的计算电路板，以及包括用于执行计算的非易失性存储器的第二区域。 这些区域通过将功率从计算电路板传送到存储器的多个电力连接器连接，以及在第一和第二区域之间传送数据的多个数据连接器。 电源和数据连接器冗余配置，从而计算电路板，电源连接器或数据连接器的故障不会中断计算。 还公开了执行这种计算的方法以及实现该方法的计算机程序产品。

公开(公告)号：US09268684B2

公开(公告)日：2016-02-23

申请号：US13931870

申请日：2013-06-29

Applicant: Silicon Graphics International Corp.

Inventor： Steven Dean ,  David R. Collins ,  Paul Kinyon

IPC: G06F13/00 ,  G06F13/28 ,  G06F12/02 ,  G06F3/06 ,  G06F11/20

CPC classification number: G06F12/0246 ,  G06F1/263 ,  G06F3/0635 ,  G06F11/2002 ,  G06F11/2007 ,  G06F11/201 ,  G06F11/2084 ,  G06F11/2089

Abstract: A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are offloaded to the secondary processor, the processors for performing the computation are not interrupted to perform these tasks. A method for use in the HPC system receives instructions in the computing processors and first data in the memory. The method includes receiving second data into the memory while continuing to execute the instructions in the computing processors, without interruption. A computer program product implementing the method is also disclosed.

Abstract translation: 高性能计算（HPC）系统包括具有包括用于执行计算的处理器的第一区域的计算刀片和包括用于执行计算的非易失性存储器的第二区域和用于执行数据移动和存储的另一个计算处理器。 由于数据移动和存储被卸载到次要处理器，所以用于执行计算的处理器不被中断以执行这些任务。 在HPC系统中使用的方法接收计算处理器中的指令和存储器中的第一数据。 该方法包括：在不间断地继续执行计算处理器中的指令的同时，将第二数据接收到存储器中。 还公开了一种实现该方法的计算机程序产品。

公开(公告)号：US09477592B2

公开(公告)日：2016-10-25

申请号：US13931861

申请日：2013-06-29

Applicant: Silicon Graphics International Corp.

Inventor： Steven Dean

IPC: G06F12/02 ,  G06F1/26 ,  G06F3/06 ,  G06F11/20

CPC classification number: G06F12/0246 ,  G06F1/263 ,  G06F3/0635 ,  G06F11/2002 ,  G06F11/2007 ,  G06F11/201 ,  G06F11/2084 ,  G06F11/2089

Abstract: A high performance computing (HPC) system includes computing blades having a first region that includes computing circuit boards having processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation. The regions are connected by a plurality of power connectors that convey power from the computing circuit boards to the memory, and a plurality of data connectors that convey data between the first and second regions. The power and data connectors are configured redundantly so that failure of a computing circuit board, a power connector, or a data connector does not interrupt the computation. A method of performing such a computation, and a computer program product implementing the method, are also disclosed.

Abstract translation: 高性能计算（HPC）系统包括具有第一区域的计算刀片，所述第一区域包括具有用于执行计算的处理器的计算电路板，以及包括用于执行计算的非易失性存储器的第二区域。 这些区域通过将功率从计算电路板传送到存储器的多个电力连接器连接，以及在第一和第二区域之间传送数据的多个数据连接器。 电源和数据连接器冗余配置，从而计算电路板，电源连接器或数据连接器的故障不会中断计算。 还公开了执行这种计算的方法以及实现该方法的计算机程序产品。

公开(公告)号：US20140297923A1

公开(公告)日：2014-10-02

申请号：US13931870

申请日：2013-06-29

Applicant: Silicon Graphics International Corp.

Inventor： Steven Dean ,  David R. Collins ,  Paul Kinyon

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F1/263 ,  G06F3/0635 ,  G06F11/2002 ,  G06F11/2007 ,  G06F11/201 ,  G06F11/2084 ,  G06F11/2089

Abstract: A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are offloaded to the secondary processor, the processors for performing the computation are not interrupted to perform these tasks. A method for use in the HPC system receives instructions in the computing processors and first data in the memory. The method includes receiving second data into the memory while continuing to execute the instructions in the computing processors, without interruption. A computer program product implementing the method is also disclosed.

Abstract translation: 高性能计算（HPC）系统包括具有包括用于执行计算的处理器的第一区域的计算刀片和包括用于执行计算的非易失性存储器的第二区域和用于执行数据移动和存储的另一个计算处理器。 由于数据移动和存储被卸载到次要处理器，所以用于执行计算的处理器不被中断以执行这些任务。 在HPC系统中使用的方法接收计算处理器中的指令和存储器中的第一数据。 该方法包括：在不间断地继续执行计算处理器中的指令的同时，将第二数据接收到存储器中。 还公开了一种实现该方法的计算机程序产品。