公开(公告)号：US20150071434A1

公开(公告)日：2015-03-12

申请号：US13838853

申请日：2013-03-15

Applicant: STATIC CONTROL COMPONENTS, INC.

Inventor： William Eli Thacker, III ,  Robert Francis Tenczar ,  Michael Clinton Hoke

IPC: H04L9/30

CPC classification number: G06F21/72 ,  B41J2/17546 ,  G03G15/0863 ,  G06F21/75 ,  G09C1/00 ,  H04L9/002 ,  H04L9/06 ,  H04L9/30 ,  H04L2209/12

Abstract: An encryption circuit for receiving an input of a first digital key and plaintext data, the encryption circuit for mathematically manipulating the digital key and the plaintext data to encrypt the plaintext data into encrypted data, wherein at least a portion of the encryption circuit comprises IBG circuitry. A decryption circuit for receiving an input of a second digital key and the encrypted data, the decryption circuit for mathematically manipulating the digital key and the encrypted data to decrypt the encrypted data into the plaintext data, wherein at least a portion of the decryption circuit comprises IBG circuitry

Abstract translation: 一种用于接收第一数字密钥和明文数据的输入的加密电路，用于数学地操纵数字密钥和明文数据的加密电路将明文数据加密成加密数据，其中加密电路的至少一部分包括IBG电路 。 一种用于接收第二数字密钥和加密数据的输入的解密电路，用于数学地操纵数字密钥和加密数据以将加密数据解密为明文数据的解密电路，其中解密电路的至少一部分包括 IBG电路

公开(公告)号：US20130154687A1

公开(公告)日：2013-06-20

申请号：US13663921

申请日：2012-10-30

Applicant: Static Control Components, Inc.

Inventor： William Eli Thacker ,  Robert Francis Tenczar ,  Michael Clinton Hoke

IPC: H03K19/20 ,  H01L21/82 ,  H01L27/06

CPC classification number: H01L27/0922 ,  H01L21/82 ,  H01L23/573 ,  H01L27/0203 ,  H01L27/06 ,  H01L28/24 ,  H01L2924/0002 ,  H03K19/20 ,  H01L2924/00

Abstract: It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques. The disclosed device uses devices having the same geometry but different voltage levels to create different logic devices. Alternatively, the disclosed uses devices having different geometries and the same operating characteristics. Also disclosed is a method of designing a chip using these devices.