公开(公告)号：US20240186186A1

公开(公告)日：2024-06-06

申请号：US18402245

申请日：2024-01-02

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Yao Lin ,  Te-Yung Liu ,  Chih-Han Lin

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L27/092

CPC分类号： H01L21/823431 ,  H01L21/823418 ,  H01L27/0886 ,  H01L27/0924

摘要： A method includes forming a first protruding semiconductor fin and a dummy fin protruding higher than top surfaces of isolation regions. The first protruding semiconductor fin is parallel to the dummy fin, forming a gate stack on a first portion of the first protruding semiconductor fin and a second portion of the dummy fin. The method further includes recessing a third portion of the first protruding semiconductor fin to form a recess, recessing an fourth portion of the dummy fin to reduce a height of the fourth portion of the dummy fin, and forming an epitaxy semiconductor region in the recess. The epitaxy semiconductor region is grown toward the dummy fin.

公开(公告)号：US11410886B2

公开(公告)日：2022-08-09

申请号：US16942076

申请日：2020-07-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Yao Lin ,  Te-Yung Liu ,  Chih-Han Lin

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L27/092

摘要： A method includes forming a first protruding semiconductor fin and a dummy fin protruding higher than top surfaces of isolation regions. The first protruding semiconductor fin is parallel to the dummy fin, forming a gate stack on a first portion of the first protruding semiconductor fin and a second portion of the dummy fin. The method further includes recessing a third portion of the first protruding semiconductor fin to form a recess, recessing an fourth portion of the dummy fin to reduce a height of the fourth portion of the dummy fin, and forming an epitaxy semiconductor region in the recess. The epitaxy semiconductor region is grown toward the dummy fin.

公开(公告)号：US11894274B2

公开(公告)日：2024-02-06

申请号：US17809953

申请日：2022-06-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Yao Lin ,  Te-Yung Liu ,  Chih-Han Lin

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L27/092

CPC分类号： H01L21/823431 ,  H01L21/823418 ,  H01L27/0886 ,  H01L27/0924

摘要： A method includes forming a first protruding semiconductor fin and a dummy fin protruding higher than top surfaces of isolation regions. The first protruding semiconductor fin is parallel to the dummy fin, forming a gate stack on a first portion of the first protruding semiconductor fin and a second portion of the dummy fin. The method further includes recessing a third portion of the first protruding semiconductor fin to form a recess, recessing an fourth portion of the dummy fin to reduce a height of the fourth portion of the dummy fin, and forming an epitaxy semiconductor region in the recess. The epitaxy semiconductor region is grown toward the dummy fin.

公开(公告)号：US11271086B2

公开(公告)日：2022-03-08

申请号：US16877317

申请日：2020-05-18

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chih-Han Lin ,  Shih-Chang Tsai ,  Wen-Shuo Hsieh ,  Te-Yung Liu

IPC分类号： H01L29/49 ,  H01L21/02 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/04 ,  H01L27/088 ,  H01L29/786 ,  H01L51/52 ,  H01L27/12 ,  H01L29/78

摘要： A semiconductor device includes plurality of fin structures extending in first direction on semiconductor substrate. Fin structure's lower portion is embedded in first insulating layer. First gate electrode and second gate electrode structures extend in second direction substantially perpendicular to first direction over of fin structures and first insulating layer. The first and second gate electrode structures are spaced apart and extend along line in same direction. First and second insulating sidewall spacers are arranged on opposing sides of first and second gate electrode structures. Each of first and second insulating sidewall spacers contiguously extend along second direction. A second insulating layer is in region between first and second gate electrode structures. The second insulating layer separates first and second gate electrode structures. A third insulating layer is in region between first and second gate electrode structures. The third insulating layer is formed of different material than second insulating layer.

公开(公告)号：US20210327763A1

公开(公告)日：2021-10-21

申请号：US16942076

申请日：2020-07-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Yao Lin ,  Te-Yung Liu ,  Chih-Han Lin

IPC分类号： H01L21/8234 ,  H01L27/092 ,  H01L27/088

摘要： A method includes forming a first protruding semiconductor fin and a dummy fin protruding higher than top surfaces of isolation regions. The first protruding semiconductor fin is parallel to the dummy fin, forming a gate stack on a first portion of the first protruding semiconductor fin and a second portion of the dummy fin. The method further includes recessing a third portion of the first protruding semiconductor fin to form a recess, recessing an fourth portion of the dummy fin to reduce a height of the fourth portion of the dummy fin, and forming an epitaxy semiconductor region in the recess. The epitaxy semiconductor region is grown toward the dummy fin.

公开(公告)号：US10658485B2

公开(公告)日：2020-05-19

申请号：US16383542

申请日：2019-04-12

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chih-Han Lin ,  Shih-Chang Tsai ,  Wen-Shuo Hsieh ,  Te-Yung Liu

IPC分类号： H01L29/78 ,  H01L29/49 ,  H01L29/786 ,  H01L27/04 ,  H01L21/8238 ,  H01L21/02 ,  H01L51/52 ,  H01L21/8234 ,  H01L21/84 ,  H01L27/088 ,  H01L27/12

摘要： A semiconductor device includes plurality of fin structures extending in first direction on semiconductor substrate. Fin structure's lower portion is embedded in first insulating layer. First gate electrode and second gate electrode structures extend in second direction substantially perpendicular to first direction over of fin structures and first insulating layer. The first and second gate electrode structures are spaced apart and extend along line in same direction. First and second insulating sidewall spacers are arranged on opposing sides of first and second gate electrode structures. Each of first and second insulating sidewall spacers contiguously extend along second direction. A second insulating layer is in region between first and second gate electrode structures. The second insulating layer separates first and second gate electrode structures. A third insulating layer is in region between first and second gate electrode structures. The third insulating layer is formed of different material than second insulating layer.

公开(公告)号：US20220328357A1

公开(公告)日：2022-10-13

申请号：US17809953

申请日：2022-06-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Yao Lin ,  Te-Yung Liu ,  Chih-Han Lin

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L27/092

摘要： A method includes forming a first protruding semiconductor fin and a dummy fin protruding higher than top surfaces of isolation regions. The first protruding semiconductor fin is parallel to the dummy fin, forming a gate stack on a first portion of the first protruding semiconductor fin and a second portion of the dummy fin. The method further includes recessing a third portion of the first protruding semiconductor fin to form a recess, recessing an fourth portion of the dummy fin to reduce a height of the fourth portion of the dummy fin, and forming an epitaxy semiconductor region in the recess. The epitaxy semiconductor region is grown toward the dummy fin.

公开(公告)号：US10263090B2

公开(公告)日：2019-04-16

申请号：US15726113

申请日：2017-10-05

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chih-Han Lin ,  Shih-Chang Tsai ,  Wen-Shuo Hsieh ,  Te-Yung Liu

IPC分类号： H01L21/8238 ,  H01L29/49 ,  H01L29/786 ,  H01L27/04 ,  H01L21/02 ,  H01L51/52 ,  H01L21/8234

摘要： A method for fabricating a semiconductor device is provided including an opening in a gate electrode layer to form two spaced apart gate electrode layers. An oxidation or nitridation treatment is performed in a region between the two spaced apart gate electrode layers. A first insulating layer is formed in the opening between the two spaced apart gate electrode layers.