公开(公告)号：US20210250021A1

公开(公告)日：2021-08-12

申请号：US17244712

申请日：2021-04-29

Applicant: Texas Instruments Incorporated

Inventor： Sarvesh Bang ,  Arun Rao ,  Joseph Pham

IPC: H03K17/0812

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to transmit signal in isolated gate drivers. An example apparatus includes a first encoder including: an edge detector coupled to a first sensor; a first clock counter coupled to the edge detector; a first signal selector coupled to the first clock counter; and a first multiplexer including coupled to a signal generator, the first clock counter, and the first signal selector; and a second encoder including: a level detector coupled to a second sensor; a second clock counter coupled to the level detector; a second signal selector coupled to the level detector and the second clock counter; and a second multiplexer coupled to the first multiplexer, a reference voltage, the second signal selector, and a modulator.

公开(公告)号：US20210028775A1

公开(公告)日：2021-01-28

申请号：US17071803

申请日：2020-10-15

Applicant: Texas Instruments Incorporated

Inventor： Shuing Ju ,  Wenxiao Tan ,  Arun Rao

IPC: H03K4/48

Abstract: Aspects provide for a circuit including a voltage supply, a driver, and a feedback bias circuit. The driver includes a first p-type field effect transistor (FET) and a first n-type FET. The voltage supply has an input and an output. The driver has a first input coupled to the voltage supply output, a second input coupled to a first node, and an output coupled to a second node. The first p-type FET has a gate coupled to the output of the driver, a source coupled to the voltage supply output, and a drain coupled to the second node. The first n-type FET has a gate coupled to the output of the second driver, a drain coupled to the second node, and a source coupled to a ground node. The feedback bias circuit has an input coupled to the second node and an output coupled to the voltage supply input.

公开(公告)号：US10855263B2

公开(公告)日：2020-12-01

申请号：US16428345

申请日：2019-05-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shuing Ju ,  Wenxiao Tan ,  Arun Rao

IPC: H03K4/48

Abstract: Aspects provide for a circuit including a voltage supply, a driver, and a feedback bias circuit. The driver includes a first p-type field effect transistor (FET) and a first n-type FET. The voltage supply has an input and an output. The driver has a first input coupled to the voltage supply output, a second input coupled to a first node, and an output coupled to a second node. The first p-type FET has a gate coupled to the output of the driver, a source coupled to the voltage supply output, and a drain coupled to the second node. The first n-type FET has a gate coupled to the output of the second driver, a drain coupled to the second node, and a source coupled to a ground node. The feedback bias circuit has an input coupled to the second node and an output coupled to the voltage supply input.

公开(公告)号：US11075620B2

公开(公告)日：2021-07-27

申请号：US17071803

申请日：2020-10-15

Applicant: Texas Instruments Incorporated

Inventor： Shuing Ju ,  Wenxiao Tan ,  Arun Rao

IPC: H03K4/48

Abstract: Aspects provide for a circuit including a voltage supply, a driver, and a feedback bias circuit. The driver includes a first p-type field effect transistor (FET) and a first n-type FET. The voltage supply has an input and an output. The driver has a first input coupled to the voltage supply output, a second input coupled to a first node, and an output coupled to a second node. The first p-type FET has a gate coupled to the output of the driver, a source coupled to the voltage supply output, and a drain coupled to the second node. The first n-type FET has a gate coupled to the output of the second driver, a drain coupled to the second node, and a source coupled to a ground node. The feedback bias circuit has an input coupled to the second node and an output coupled to the voltage supply input.

公开(公告)号：US11025242B2

公开(公告)日：2021-06-01

申请号：US16933453

申请日：2020-07-20

Applicant: Texas Instruments Incorporated

Inventor： Sarvesh Bang ,  Arun Rao ,  Joseph Pham

IPC: H03K17/08 ,  H03K17/04 ,  H03K5/08 ,  H03K17/0812

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to transmit signal in isolated gate drivers. An example apparatus includes a first encoder including: an edge detector coupled to a first sensor; a first clock counter coupled to the edge detector; a first signal selector coupled to the first clock counter; and a first multiplexer including coupled to a signal generator, the first clock counter, and the first signal selector; and a second encoder including: a level detector coupled to a second sensor; a second clock counter coupled to the level detector; a second signal selector coupled to the level detector and the second clock counter; and a second multiplexer coupled to the first multiplexer, a reference voltage, the second signal selector, and a modulator.

公开(公告)号：US20210044294A1

公开(公告)日：2021-02-11

申请号：US17082937

申请日：2020-10-28

Applicant: Texas Instruments Incorporated

Inventor： Mayank Garg ,  Shu-Ing Ju ,  Arun Rao ,  Wei Zhang

IPC: H03K17/687 ,  H03K17/693

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for a multi-level turn-off circuit. An example power delivery circuit includes a two-level turn-off circuit to be coupled to a first switch to reduce a first gate voltage of the first switch from a first voltage to a second voltage when a current flowing through the first switch is greater than an over-current threshold, the two-level turn-off circuit including a second switch, a voltage-current-voltage buffer to reduce a second gate voltage of the second switch from a third voltage to a fourth voltage, and a comparator circuit to turn off the second switch when the second gate voltage is the fourth voltage, and a driver to be coupled to the first switch to turn off the first switch when the second gate voltage is the fourth voltage.

公开(公告)号：US11528026B2

公开(公告)日：2022-12-13

申请号：US17082937

申请日：2020-10-28

Applicant: Texas Instruments Incorporated

Inventor： Mayank Garg ,  Shu-Ing Ju ,  Arun Rao ,  Wei Zhang

IPC: H03K17/687 ,  H03K17/693

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for a multi-level turn-off circuit. An example power delivery circuit includes a two-level turn-off circuit to be coupled to a first switch to reduce a first gate voltage of the first switch from a first voltage to a second voltage when a current flowing through the first switch is greater than an over-current threshold, the two-level turn-off circuit including a second switch, a voltage-current-voltage buffer to reduce a second gate voltage of the second switch from a third voltage to a fourth voltage, and a comparator circuit to turn off the second switch when the second gate voltage is the fourth voltage, and a driver to be coupled to the first switch to turn off the first switch when the second gate voltage is the fourth voltage.

公开(公告)号：US10855275B2

公开(公告)日：2020-12-01

申请号：US16399611

申请日：2019-04-30

Applicant: Texas Instruments Incorporated

Inventor： Mayank Garg ,  Shu-Ing Ju ,  Arun Rao ,  Wei Zhang

IPC: H03K17/687 ,  H03K17/693

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for a multi-level turn-off circuit. An example power delivery circuit includes a two-level turn-off circuit to be coupled to a first switch to reduce a first gate voltage of the first switch from a first voltage to a second voltage when a current flowing through the first switch is greater than an over-current threshold, the two-level turn-off circuit including a second switch, a voltage-current-voltage buffer to reduce a second gate voltage of the second switch from a third voltage to a fourth voltage, and a comparator circuit to turn off the second switch when the second gate voltage is the fourth voltage, and a driver to be coupled to the first switch to turn off the first switch when the second gate voltage is the fourth voltage.

公开(公告)号：US20200350905A1

公开(公告)日：2020-11-05

申请号：US16933453

申请日：2020-07-20

Applicant: Texas Instruments Incorporated

Inventor： Sarvesh Bang ,  Arun Rao ,  Joseph Pham

IPC: H03K17/0812

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to transmit signal in isolated gate drivers. An example apparatus includes a first encoder including: an edge detector coupled to a first sensor; a first clock counter coupled to the edge detector; a first signal selector coupled to the first clock counter; and a first multiplexer including coupled to a signal generator, the first clock counter, and the first signal selector; and a second encoder including: a level detector coupled to a second sensor; a second clock counter coupled to the level detector; a second signal selector coupled to the level detector and the second clock counter; and a second multiplexer coupled to the first multiplexer, a reference voltage, the second signal selector, and a modulator.

公开(公告)号：US10763844B2

公开(公告)日：2020-09-01

申请号：US16552805

申请日：2019-08-27

Applicant: Texas Instruments Incorporated

Inventor： Sarvesh Bang ,  Arun Rao ,  Joseph Pham

IPC: H03K17/0812

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to transmit signals in isolated gate drivers. An example apparatus includes a first encoder including: an edge detector coupled to a first sensor; a first clock counter coupled to the edge detector; a first signal selector coupled to the first clock counter; and a first multiplexer coupled to a signal generator, the first clock counter, and the first signal selector; and a second encoder including: a level detector coupled to a second sensor; a second clock counter coupled to the level detector; a second signal selector coupled to the level detector and the second clock counter; and a second multiplexer coupled to the first multiplexer, a reference voltage, the second signal selector, and a modulator.