Data and power isolation barrier
    1.
    发明授权

    公开(公告)号:US11443889B2

    公开(公告)日:2022-09-13

    申请号:US16903618

    申请日:2020-06-17

    Abstract: A semiconductor package includes a transformer having a primary winding and a secondary winding. The primary winding has first and second terminals and a pair of taps. The secondary winding has first and second terminals and a pair of taps. The semiconductor package includes first and second data transfer circuits, a bridge, and a rectifier. The first data transfer circuit is coupled to the pair of taps of the primary winding. The second data transfer circuit is coupled to the pair of taps of the secondary winding. The bridge is coupled to the first and second terminals of the primary winding. The rectifier is coupled to the first and second terminals of the secondary winding.

    Bus transceiver with ring suppression

    公开(公告)号:US11310072B2

    公开(公告)日:2022-04-19

    申请号:US17063450

    申请日:2020-10-05

    Abstract: A transceiver includes a driver stage and a transient-triggered ring suppression circuit. The driver stage has a first transistor coupled between a supply voltage terminal and a first bus terminal and a second transistor coupled between a ground and a second bus terminal. The transient-triggered ring suppression circuit is coupled to the first and second transistors. The transient-triggered ring suppression circuit is configured to be enabled upon transition of the transceiver from a dominant state to a recessive state. Further, while the transceiver is in the recessive state, the transient-triggered ring suppression circuit is configured to attenuate ringing on at least one of the first or second bus terminals.

    Lead Frame for Multi-Chip Modules With Integrated Surge Protection

    公开(公告)号:US20210159192A1

    公开(公告)日:2021-05-27

    申请号:US16697617

    申请日:2019-11-27

    Abstract: A lead frame for a multi-chip module includes a first conductor structure disposed on a substrate and having first and second arms linked at an angle. The first conductor structure is connected to ground. The lead frame also includes a second conductor structure disposed on the substrate and connected to a voltage supply. The second conductor structure is spaced apart and electrically isolated from the first conductor structure. The first and the second conductor structures are arranged to flank a plurality of integrated circuits (ICs) including one or more surge protection ICs disposed on the substrate. The first conductor structure is electrically connected to the plurality of ICs to provide electrical connections to ground, and the second conductor structure is electrically connected to the plurality of ICs to provide electrical connections to the voltage supply.

    Lead frame for multi-chip modules with integrated surge protection

    公开(公告)号:US11380631B2

    公开(公告)日:2022-07-05

    申请号:US16697617

    申请日:2019-11-27

    Abstract: A lead frame for a multi-chip module includes a first conductor structure disposed on a substrate and having first and second arms linked at an angle. The first conductor structure is connected to ground. The lead frame also includes a second conductor structure disposed on the substrate and connected to a voltage supply. The second conductor structure is spaced apart and electrically isolated from the first conductor structure. The first and the second conductor structures are arranged to flank a plurality of integrated circuits (ICs) including one or more surge protection ICs disposed on the substrate. The first conductor structure is electrically connected to the plurality of ICs to provide electrical connections to ground, and the second conductor structure is electrically connected to the plurality of ICs to provide electrical connections to the voltage supply.

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